phy: marvell: cp110: utmi: update analog parameters according to latest ETP

Add UTMI analog parameters initialization values according to
latest ETP.

Change-Id: I5bcca205a3995202a18ff126f371a81f69e205c8
Signed-off-by: Igal Liberman <igall@marvell.com>

diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index 82d86936885823cee8b4b86150e89bed890a68ec..72563f8bc1c5c0b93f4a33c0e1c4ac0023a8d6d7 100644 (file)
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -614,15 +614,12 @@ static void comphy_utmi_phy_config(u32 utmi_index, void __iomem *utmi_base_addr,
 
        /* Impedance Calibration Threshold Setting */
        reg_set(utmi_base_addr + UTMI_CALIB_CTRL_REG,
-               0x6 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET,
+               0x7 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET,
                UTMI_CALIB_CTRL_IMPCAL_VTH_MASK);
 
        /* Set LS TX driver strength coarse control */
-       mask = UTMI_TX_CH_CTRL_DRV_EN_LS_MASK;
-       data = 0x3 << UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET;
-       /* Set LS TX driver fine adjustment */
-       mask |= UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK;
-       data |= 0x3 << UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET;
+       mask = UTMI_TX_CH_CTRL_AMP_MASK;
+       data = 0x4 << UTMI_TX_CH_CTRL_AMP_OFFSET;
        reg_set(utmi_base_addr + UTMI_TX_CH_CTRL_REG, data, mask);
 
        /* Enable SQ */

diff --git a/drivers/phy/marvell/utmi_phy.h b/drivers/phy/marvell/utmi_phy.h
index 682a3acc40d836cdb27bed6e49bd287e3225c4fe..fa6bf3c9141efddf40e73ff9226af0a11dedacba 100644 (file)
--- a/drivers/phy/marvell/utmi_phy.h
+++ b/drivers/phy/marvell/utmi_phy.h
@@ -52,6 +52,9 @@
 #define UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET      16
 #define UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK                \
        (0xf << UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET)
+#define UTMI_TX_CH_CTRL_AMP_OFFSET             20
+#define UTMI_TX_CH_CTRL_AMP_MASK               \
+       (0x7 << UTMI_TX_CH_CTRL_AMP_OFFSET)
 
 #define UTMI_RX_CH_CTRL0_REG                   0x14
 #define UTMI_RX_CH_CTRL0_SQ_DET_OFFSET         15
@@ -64,7 +67,7 @@
 #define UTMI_RX_CH_CTRL1_REG                   0x18
 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET     0
 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_MASK       \
-       (0x3 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET)
+       (0x7 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET)
 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET  3
 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_MASK    \
        (0x1 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET)