]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
spi: spi-uclass: Read chipselect and restrict capabilities
authorVenkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Thu, 26 Sep 2024 04:55:05 +0000 (10:25 +0530)
committerTom Rini <trini@konsulko.com>
Wed, 9 Oct 2024 15:01:54 +0000 (09:01 -0600)
Read chipselect properties from DT which are populated using 'reg'
property and save it in plat->cs[] array for later use.

Also read multi chipselect capability which is used for
parallel-memories and return errors if they are passed on using DT but
driver is not capable of handling it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
41 files changed:
drivers/mtd/spi/sandbox.c
drivers/spi/altera_spi.c
drivers/spi/atcspi200_spi.c
drivers/spi/ath79_spi.c
drivers/spi/atmel_spi.c
drivers/spi/bcm63xx_hsspi.c
drivers/spi/bcm63xx_spi.c
drivers/spi/bcmbca_hsspi.c
drivers/spi/cf_spi.c
drivers/spi/davinci_spi.c
drivers/spi/fsl_dspi.c
drivers/spi/fsl_espi.c
drivers/spi/fsl_qspi.c
drivers/spi/gxp_spi.c
drivers/spi/mpc8xx_spi.c
drivers/spi/mpc8xxx_spi.c
drivers/spi/mscc_bb_spi.c
drivers/spi/mxc_spi.c
drivers/spi/npcm_fiu_spi.c
drivers/spi/nxp_fspi.c
drivers/spi/octeon_spi.c
drivers/spi/omap3_spi.c
drivers/spi/pic32_spi.c
drivers/spi/rk_spi.c
drivers/spi/rockchip_sfc.c
drivers/spi/spi-aspeed-smc.c
drivers/spi/spi-mxic.c
drivers/spi/spi-qup.c
drivers/spi/spi-sifive.c
drivers/spi/spi-sn-f-ospi.c
drivers/spi/spi-sunxi.c
drivers/spi/spi-synquacer.c
drivers/spi/spi-uclass.c
drivers/spi/stm32_qspi.c
drivers/spi/stm32_spi.c
drivers/spi/ti_qspi.c
drivers/spi/xilinx_spi.c
drivers/spi/zynq_qspi.c
drivers/spi/zynq_spi.c
include/spi.h
lib/acpi/acpi_device.c

index 2d5a16bf6a29a6ddd4240d47450224cda542c3d9..e5ebc3479fb1201d610ec2b895579221cce5b8e7 100644 (file)
@@ -138,7 +138,7 @@ static int sandbox_sf_probe(struct udevice *dev)
                return ret;
        }
        slave_plat = dev_get_parent_plat(dev);
-       cs = slave_plat->cs;
+       cs = slave_plat->cs[0];
        debug("found at cs %d\n", cs);
 
        if (!pdata->filename) {
index 8e227d187b0c214978ed9c8deb6bdee6112d7606..dafaf1130bb379783ab5ef11da6e5ffd9ce00b68 100644 (file)
@@ -95,7 +95,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen,
        uint32_t reg, data, start;
 
        debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
-             dev_seq(bus), slave_plat->cs, bitlen, bytes, flags);
+             dev_seq(bus), slave_plat->cs[0], bitlen, bytes, flags);
 
        if (bitlen == 0)
                goto done;
@@ -110,7 +110,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen,
                readl(&regs->rxdata);
 
        if (flags & SPI_XFER_BEGIN)
-               spi_cs_activate(dev, slave_plat->cs);
+               spi_cs_activate(dev, slave_plat->cs[0]);
 
        while (bytes--) {
                if (txp)
index 2178534baf0e2609041b46aee230b438ebe1a85d..72b612c6560fbda7e1d2b9bc9515c25c446c8ab9 100644 (file)
@@ -319,7 +319,7 @@ static int atcspi200_spi_claim_bus(struct udevice *dev)
        struct udevice *bus = dev->parent;
        struct nds_spi_slave *ns = dev_get_priv(bus);
 
-       if (slave_plat->cs >= ns->num_cs) {
+       if (slave_plat->cs[0] >= ns->num_cs) {
                printf("Invalid SPI chipselect\n");
                return -EINVAL;
        }
index fb2d77d7d4a761bb0515cbc3be0ff37e560a5a62..b0ed14f0cfc933d9f647c038038ceed078ccbb93 100644 (file)
@@ -73,7 +73,7 @@ static int ath79_spi_xfer(struct udevice *dev, unsigned int bitlen,
        if (restbits)
                bytes++;
 
-       out = AR71XX_SPI_IOC_CS_ALL & ~(AR71XX_SPI_IOC_CS(slave->cs));
+       out = AR71XX_SPI_IOC_CS_ALL & ~(AR71XX_SPI_IOC_CS(slave->cs[0]));
        while (bytes > 0) {
                bytes--;
                curbyte = 0;
index 79f010013184f9d85ef5888332fe9af6750d19ba..aaf3eddae423998589dc98b3edf9e1b01b5b53a4 100644 (file)
@@ -125,7 +125,7 @@ static int atmel_spi_claim_bus(struct udevice *dev)
        struct atmel_spi_priv *priv = dev_get_priv(bus);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
        struct at91_spi *reg_base = bus_plat->regs;
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
        u32 freq = priv->freq;
        u32 scbr, csrx, mode;
 
@@ -174,7 +174,7 @@ static void atmel_spi_cs_activate(struct udevice *dev)
        struct udevice *bus = dev_get_parent(dev);
        struct atmel_spi_priv *priv = dev_get_priv(bus);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
 
        if (!dm_gpio_is_valid(&priv->cs_gpios[cs]))
                return;
@@ -189,7 +189,7 @@ static void atmel_spi_cs_deactivate(struct udevice *dev)
        struct udevice *bus = dev_get_parent(dev);
        struct atmel_spi_priv *priv = dev_get_priv(bus);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
 
        if (!dm_gpio_is_valid(&priv->cs_gpios[cs]))
                return;
index 1aa43fd3a23854879bf12af72521251a4b581fba..e9f0b343abb9f7c15d45a9b7d158def7342313ab 100644 (file)
@@ -174,7 +174,7 @@ static void bcm63xx_hsspi_activate_cs(struct bcm63xx_hsspi_priv *priv,
        set = DIV_ROUND_UP(2048, set);
        set &= SPI_PFL_CLK_FREQ_MASK;
        set |= SPI_PFL_CLK_RSTLOOP_MASK;
-       writel(set, priv->regs + SPI_PFL_CLK_REG(plat->cs));
+       writel(set, priv->regs + SPI_PFL_CLK_REG(plat->cs[0]));
 
        /* profile signal */
        set = 0;
@@ -192,29 +192,29 @@ static void bcm63xx_hsspi_activate_cs(struct bcm63xx_hsspi_priv *priv,
        if (speed > SPI_MAX_SYNC_CLOCK)
                set |= SPI_PFL_SIG_ASYNCIN_MASK;
 
-       clrsetbits_32(priv->regs + SPI_PFL_SIG_REG(plat->cs), clr, set);
+       clrsetbits_32(priv->regs + SPI_PFL_SIG_REG(plat->cs[0]), clr, set);
 
        /* global control */
        set = 0;
        clr = 0;
 
        if (priv->xfer_mode == HSSPI_XFER_MODE_PREPEND) {
-               if (priv->cs_pols & BIT(plat->cs))
-                       set |= BIT(plat->cs);
+               if (priv->cs_pols & BIT(plat->cs[0]))
+                       set |= BIT(plat->cs[0]);
                else
-                       clr |= BIT(plat->cs);
+                       clr |= BIT(plat->cs[0]);
        } else {
                /* invert cs polarity */
-               if (priv->cs_pols & BIT(plat->cs))
-                       clr |= BIT(plat->cs);
+               if (priv->cs_pols & BIT(plat->cs[0]))
+                       clr |= BIT(plat->cs[0]);
                else
-                       set |= BIT(plat->cs);
+                       set |= BIT(plat->cs[0]);
 
                /* invert dummy cs polarity */
-               if (priv->cs_pols & BIT(!plat->cs))
-                       clr |= BIT(!plat->cs);
+               if (priv->cs_pols & BIT(!plat->cs[0]))
+                       clr |= BIT(!plat->cs[0]);
                else
-                       set |= BIT(!plat->cs);
+                       set |= BIT(!plat->cs[0]);
        }
 
        clrsetbits_32(priv->regs + SPI_CTL_REG, clr, set);
@@ -290,7 +290,7 @@ static int bcm63xx_hsspi_xfer_dummy_cs(struct udevice *dev, unsigned int data_by
 
        if (plat->mode & SPI_3WIRE)
                val |= SPI_PFL_MODE_3WIRE_MASK;
-       writel(val, priv->regs + SPI_PFL_MODE_REG(plat->cs));
+       writel(val, priv->regs + SPI_PFL_MODE_REG(plat->cs[0]));
 
        /* transfer loop */
        while (data_bytes > 0) {
@@ -310,9 +310,9 @@ static int bcm63xx_hsspi_xfer_dummy_cs(struct udevice *dev, unsigned int data_by
 
                /* issue the transfer */
                val = SPI_CMD_OP_START;
-               val |= (plat->cs << SPI_CMD_PFL_SHIFT) &
+               val |= (plat->cs[0] << SPI_CMD_PFL_SHIFT) &
                       SPI_CMD_PFL_MASK;
-               val |= (!plat->cs << SPI_CMD_SLAVE_SHIFT) &
+               val |= (!plat->cs[0] << SPI_CMD_SLAVE_SHIFT) &
                       SPI_CMD_SLAVE_MASK;
                writel(val, priv->regs + SPI_CMD_REG);
 
@@ -450,7 +450,7 @@ static int bcm63xx_hsspi_xfer_prepend(struct udevice *dev, unsigned int data_byt
                        }
                }
                val |= (priv->prepend_cnt << SPI_PFL_MODE_PREPCNT_SHIFT);
-               writel(val, priv->regs + SPI_PFL_MODE_REG(plat->cs));
+               writel(val, priv->regs + SPI_PFL_MODE_REG(plat->cs[0]));
 
                /* set fifo operation */
                val = opcode | (data_bytes & HSSPI_FIFO_OP_BYTES_MASK);
@@ -459,9 +459,9 @@ static int bcm63xx_hsspi_xfer_prepend(struct udevice *dev, unsigned int data_byt
 
                /* issue the transfer */
                val = SPI_CMD_OP_START;
-               val |= (plat->cs << SPI_CMD_PFL_SHIFT) &
+               val |= (plat->cs[0] << SPI_CMD_PFL_SHIFT) &
                       SPI_CMD_PFL_MASK;
-               val |= (plat->cs << SPI_CMD_SLAVE_SHIFT) &
+               val |= (plat->cs[0] << SPI_CMD_SLAVE_SHIFT) &
                       SPI_CMD_SLAVE_MASK;
                writel(val, priv->regs + SPI_CMD_REG);
 
@@ -537,16 +537,16 @@ static int bcm63xx_hsspi_child_pre_probe(struct udevice *dev)
        struct spi_slave *slave = dev_get_parent_priv(dev);
 
        /* check cs */
-       if (plat->cs >= priv->num_cs) {
-               printf("no cs %u\n", plat->cs);
+       if (plat->cs[0] >= priv->num_cs) {
+               printf("no cs %u\n", plat->cs[0]);
                return -ENODEV;
        }
 
        /* cs polarity */
        if (plat->mode & SPI_CS_HIGH)
-               priv->cs_pols |= BIT(plat->cs);
+               priv->cs_pols |= BIT(plat->cs[0]);
        else
-               priv->cs_pols &= ~BIT(plat->cs);
+               priv->cs_pols &= ~BIT(plat->cs[0]);
 
        /*
         * set the max read/write size to make sure each xfer are within the
index 595b41c8ab8a52092788264d9b382f9cc18bc463..e02ec7e8bd713b0e6f1d737500dc046c21927983 100644 (file)
@@ -275,7 +275,7 @@ static int bcm63xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
                /* issue the transfer */
                cmd = SPI_CMD_OP_START;
-               cmd |= (plat->cs << SPI_CMD_SLAVE_SHIFT) & SPI_CMD_SLAVE_MASK;
+               cmd |= (plat->cs[0] << SPI_CMD_SLAVE_SHIFT) & SPI_CMD_SLAVE_MASK;
                cmd |= (priv->tx_bytes << SPI_CMD_PREPEND_SHIFT);
                if (plat->mode & SPI_3WIRE)
                        cmd |= SPI_CMD_3WIRE_MASK;
@@ -353,8 +353,8 @@ static int bcm63xx_spi_child_pre_probe(struct udevice *dev)
        struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
 
        /* check cs */
-       if (plat->cs >= priv->num_cs) {
-               printf("no cs %u\n", plat->cs);
+       if (plat->cs[0] >= priv->num_cs) {
+               printf("no cs %u\n", plat->cs[0]);
                return -ENODEV;
        }
 
index eff9e1117d35a68fa8f494f393fcd5d9a233058b..209ca71327977c2fae17bd1a6aa89f4fc41ab215 100644 (file)
@@ -155,7 +155,7 @@ static void bcmbca_hsspi_setup_clock(struct bcmbca_hsspi_priv *priv,
        set = DIV_ROUND_UP(2048, set);
        set &= SPI_PFL_CLK_FREQ_MASK;
        set |= SPI_PFL_CLK_RSTLOOP_MASK;
-       writel(set, priv->regs + SPI_PFL_CLK_REG(plat->cs));
+       writel(set, priv->regs + SPI_PFL_CLK_REG(plat->cs[0]));
 
        /* profile signal */
        set = 0;
@@ -173,16 +173,16 @@ static void bcmbca_hsspi_setup_clock(struct bcmbca_hsspi_priv *priv,
        if (priv->speed > SPI_MAX_SYNC_CLOCK)
                set |= SPI_PFL_SIG_ASYNCIN_MASK;
 
-       clrsetbits_32(priv->regs + SPI_PFL_SIG_REG(plat->cs), clr, set);
+       clrsetbits_32(priv->regs + SPI_PFL_SIG_REG(plat->cs[0]), clr, set);
 
        /* global control */
        set = 0;
        clr = 0;
 
-       if (priv->cs_pols & BIT(plat->cs))
-               set |= BIT(plat->cs);
+       if (priv->cs_pols & BIT(plat->cs[0]))
+               set |= BIT(plat->cs[0]);
        else
-               clr |= BIT(plat->cs);
+               clr |= BIT(plat->cs[0]);
 
        clrsetbits_32(priv->regs + SPI_CTL_REG, clr, set);
 }
@@ -194,7 +194,7 @@ static void bcmbca_hsspi_activate_cs(struct bcmbca_hsspi_priv *priv,
 
        /* set the override bit */
        val = readl(priv->spim_ctrl);
-       val |= BIT(plat->cs + SPIM_CTRL_CS_OVERRIDE_SEL_SHIFT);
+       val |= BIT(plat->cs[0] + SPIM_CTRL_CS_OVERRIDE_SEL_SHIFT);
        writel(val, priv->spim_ctrl);
 }
 
@@ -205,7 +205,7 @@ static void bcmbca_hsspi_deactivate_cs(struct bcmbca_hsspi_priv *priv,
 
        /* clear the cs override bit */
        val = readl(priv->spim_ctrl);
-       val &= ~BIT(plat->cs + SPIM_CTRL_CS_OVERRIDE_SEL_SHIFT);
+       val &= ~BIT(plat->cs[0] + SPIM_CTRL_CS_OVERRIDE_SEL_SHIFT);
        writel(val, priv->spim_ctrl);
 }
 
@@ -250,7 +250,7 @@ static int bcmbca_hsspi_xfer(struct udevice *dev, unsigned int bitlen,
 
        if (plat->mode & SPI_3WIRE)
                val |= SPI_PFL_MODE_3WIRE_MASK;
-       writel(val, priv->regs + SPI_PFL_MODE_REG(plat->cs));
+       writel(val, priv->regs + SPI_PFL_MODE_REG(plat->cs[0]));
 
        /* transfer loop */
        while (data_bytes > 0) {
@@ -276,9 +276,9 @@ static int bcmbca_hsspi_xfer(struct udevice *dev, unsigned int bitlen,
 
                /* issue the transfer */
                val = SPI_CMD_OP_START;
-               val |= (plat->cs << SPI_CMD_PFL_SHIFT) &
+               val |= (plat->cs[0] << SPI_CMD_PFL_SHIFT) &
                          SPI_CMD_PFL_MASK;
-               val |= (plat->cs << SPI_CMD_SLAVE_SHIFT) &
+               val |= (plat->cs[0] << SPI_CMD_SLAVE_SHIFT) &
                          SPI_CMD_SLAVE_MASK;
                writel(val, priv->regs + SPI_CMD_REG);
 
@@ -326,22 +326,22 @@ static int bcmbca_hsspi_child_pre_probe(struct udevice *dev)
        u32 val;
 
        /* check cs */
-       if (plat->cs >= priv->num_cs) {
-               dev_err(dev, "no cs %u\n", plat->cs);
+       if (plat->cs[0] >= priv->num_cs) {
+               dev_err(dev, "no cs %u\n", plat->cs[0]);
                return -EINVAL;
        }
 
        /* cs polarity */
        if (plat->mode & SPI_CS_HIGH)
-               priv->cs_pols |= BIT(plat->cs);
+               priv->cs_pols |= BIT(plat->cs[0]);
        else
-               priv->cs_pols &= ~BIT(plat->cs);
+               priv->cs_pols &= ~BIT(plat->cs[0]);
 
        /* set the polarity to spim cs register */
        val = readl(priv->spim_ctrl);
-       val &= ~BIT(plat->cs + SPIM_CTRL_CS_OVERRIDE_VAL_SHIFT);
-       if (priv->cs_pols & BIT(plat->cs))
-               val |= BIT(plat->cs + SPIM_CTRL_CS_OVERRIDE_VAL_SHIFT);
+       val &= ~BIT(plat->cs[0] + SPIM_CTRL_CS_OVERRIDE_VAL_SHIFT);
+       if (priv->cs_pols & BIT(plat->cs[0]))
+               val |= BIT(plat->cs[0] + SPIM_CTRL_CS_OVERRIDE_VAL_SHIFT);
        writel(val, priv->spim_ctrl);
 
        return 0;
index 8234468b1d4364f1ffef81fef29adac5647865e7..84077c01d8367abec54838a9c59a753688be8502 100644 (file)
@@ -123,7 +123,7 @@ static int coldfire_spi_claim_bus(struct udevice *dev)
        /* Clear FIFO and resume transfer */
        clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
 
-       dspi_chip_select(slave_plat->cs);
+       dspi_chip_select(slave_plat->cs[0]);
 
        return 0;
 }
@@ -139,7 +139,7 @@ static int coldfire_spi_release_bus(struct udevice *dev)
        /* Clear FIFO */
        clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
 
-       dspi_chip_unselect(slave_plat->cs);
+       dspi_chip_unselect(slave_plat->cs[0]);
 
        return 0;
 }
@@ -168,7 +168,7 @@ static int coldfire_spi_xfer(struct udevice *dev, unsigned int bitlen,
        if ((flags & SPI_XFER_BEGIN) == SPI_XFER_BEGIN)
                ctrl |= DSPI_TFR_CONT;
 
-       ctrl = setup_ctrl(ctrl, slave_plat->cs);
+       ctrl = setup_ctrl(ctrl, slave_plat->cs[0]);
 
        if (len > 1) {
                int tmp_len = len - 1;
index 82049872d057c27f0e996c970e2aafb19a7fa6e7..b264c52abbd06f46d4719d1d77e2bebfd2090703 100644 (file)
@@ -338,13 +338,13 @@ static int davinci_spi_claim_bus(struct udevice *dev)
        struct udevice *bus = dev->parent;
        struct davinci_spi_slave *ds = dev_get_priv(bus);
 
-       if (slave_plat->cs >= ds->num_cs) {
+       if (slave_plat->cs[0] >= ds->num_cs) {
                printf("Invalid SPI chipselect\n");
                return -EINVAL;
        }
        ds->half_duplex = slave_plat->mode & SPI_PREAMBLE;
 
-       return __davinci_spi_claim_bus(ds, slave_plat->cs);
+       return __davinci_spi_claim_bus(ds, slave_plat->cs[0]);
 }
 
 static int davinci_spi_release_bus(struct udevice *dev)
@@ -363,11 +363,11 @@ static int davinci_spi_xfer(struct udevice *dev, unsigned int bitlen,
        struct udevice *bus = dev->parent;
        struct davinci_spi_slave *ds = dev_get_priv(bus);
 
-       if (slave->cs >= ds->num_cs) {
+       if (slave->cs[0] >= ds->num_cs) {
                printf("Invalid SPI chipselect\n");
                return -EINVAL;
        }
-       ds->cur_cs = slave->cs;
+       ds->cur_cs = slave->cs[0];
 
        return __davinci_spi_xfer(ds, bitlen, dout, din, flags);
 }
index 1d4d90ce5aaf1ddf1a0bd1152cf1385e3653b151..f2393c041f4447d9bec7362c0b9575a161dcbabf 100644 (file)
@@ -452,9 +452,9 @@ static int fsl_dspi_child_pre_probe(struct udevice *dev)
        unsigned char pcssck = 0, cssck = 0;
        unsigned char pasc = 0, asc = 0;
 
-       if (slave_plat->cs >= priv->num_chipselect) {
+       if (slave_plat->cs[0] >= priv->num_chipselect) {
                debug("DSPI invalid chipselect number %d(max %d)!\n",
-                     slave_plat->cs, priv->num_chipselect - 1);
+                     slave_plat->cs[0], priv->num_chipselect - 1);
                return -EINVAL;
        }
 
@@ -469,12 +469,12 @@ static int fsl_dspi_child_pre_probe(struct udevice *dev)
        /* Set After SCK delay scale values */
        ns_delay_scale(&pasc, &asc, sck_cs_delay, priv->bus_clk);
 
-       priv->ctar_val[slave_plat->cs] = DSPI_CTAR_DEFAULT_VALUE |
+       priv->ctar_val[slave_plat->cs[0]] = DSPI_CTAR_DEFAULT_VALUE |
                                         DSPI_CTAR_PCSSCK(pcssck) |
                                         DSPI_CTAR_PASC(pasc);
 
        debug("DSPI pre_probe slave device on CS %u, max_hz %u, mode 0x%x.\n",
-             slave_plat->cs, slave_plat->max_hz, slave_plat->mode);
+             slave_plat->cs[0], slave_plat->max_hz, slave_plat->mode);
 
        return 0;
 }
@@ -527,13 +527,13 @@ static int fsl_dspi_claim_bus(struct udevice *dev)
        priv = dev_get_priv(bus);
 
        /* processor special preparation work */
-       cpu_dspi_claim_bus(dev_seq(bus), slave_plat->cs);
+       cpu_dspi_claim_bus(dev_seq(bus), slave_plat->cs[0]);
 
        /* configure transfer mode */
-       fsl_dspi_cfg_ctar_mode(priv, slave_plat->cs, priv->mode);
+       fsl_dspi_cfg_ctar_mode(priv, slave_plat->cs[0], priv->mode);
 
        /* configure active state of CSX */
-       fsl_dspi_cfg_cs_active_state(priv, slave_plat->cs,
+       fsl_dspi_cfg_cs_active_state(priv, slave_plat->cs[0],
                                     priv->mode);
 
        fsl_dspi_clr_fifo(priv);
@@ -559,7 +559,7 @@ static int fsl_dspi_release_bus(struct udevice *dev)
        dspi_halt(priv, 1);
 
        /* processor special release work */
-       cpu_dspi_release_bus(dev_seq(bus), slave_plat->cs);
+       cpu_dspi_release_bus(dev_seq(bus), slave_plat->cs[0]);
 
        return 0;
 }
@@ -615,7 +615,7 @@ static int fsl_dspi_xfer(struct udevice *dev, unsigned int bitlen,
        bus = dev->parent;
        priv = dev_get_priv(bus);
 
-       return dspi_xfer(priv, slave_plat->cs, bitlen, dout, din, flags);
+       return dspi_xfer(priv, slave_plat->cs[0], bitlen, dout, din, flags);
 }
 
 static int fsl_dspi_set_speed(struct udevice *bus, uint speed)
index 2638ed2520014e2d2591932d823a9fb62b62df00..7ed35aa3e66930ca77df270904525e5a32611fb1 100644 (file)
@@ -513,8 +513,8 @@ static int fsl_espi_child_pre_probe(struct udevice *dev)
        struct udevice *bus = dev->parent;
        struct fsl_spi_slave *fsl = dev_get_priv(bus);
 
-       debug("%s cs %u\n", __func__, slave_plat->cs);
-       fsl->cs = slave_plat->cs;
+       debug("%s cs %u\n", __func__, slave_plat->cs[0]);
+       fsl->cs = slave_plat->cs[0];
 
        return 0;
 }
index 8a0a53cb372034b5ebb1ef39d094f135d6bb4fb3..c7f554826c3d4ba8291471398d7c638d8fdbc7be 100644 (file)
@@ -510,10 +510,10 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct spi_slave *slave)
        struct dm_spi_slave_plat *plat =
                dev_get_parent_plat(slave->dev);
 
-       if (q->selected == plat->cs)
+       if (q->selected == plat->cs[0])
                return;
 
-       q->selected = plat->cs;
+       q->selected = plat->cs[0];
        fsl_qspi_invalidate(q);
 }
 
index 70d76ac66adf39650149967d9ddc9dd2232ca337..3ee369c5a032ece98c41d06d9c851ce73ac6bd6e 100644 (file)
@@ -87,7 +87,7 @@ static int gxp_spi_xfer(struct udevice *dev, unsigned int bitlen, const void *do
                value = readl(priv->base + OFFSET_SPIMCFG);
                value &= ~(1 << 24);
                /* set chipselect */
-               value |= (slave_plat->cs << 24);
+               value |= (slave_plat->cs[0] << 24);
 
                /* addr reg and addr size */
                if (len >= 4) {
index 7e72fb9e23dc7d60e8d76709b375c5363e58d37f..51cc487271d5e61c388797439ad2f148f005c3aa 100644 (file)
@@ -148,7 +148,7 @@ static void mpc8xx_spi_cs_activate(struct udevice *dev)
        struct mpc8xx_priv *priv = dev_get_priv(dev->parent);
        struct dm_spi_slave_plat *platdata = dev_get_parent_plat(dev);
 
-       dm_gpio_set_value(&priv->gpios[platdata->cs], 1);
+       dm_gpio_set_value(&priv->gpios[platdata->cs[0]], 1);
 }
 
 static void mpc8xx_spi_cs_deactivate(struct udevice *dev)
@@ -156,7 +156,7 @@ static void mpc8xx_spi_cs_deactivate(struct udevice *dev)
        struct mpc8xx_priv *priv = dev_get_priv(dev->parent);
        struct dm_spi_slave_plat *platdata = dev_get_parent_plat(dev);
 
-       dm_gpio_set_value(&priv->gpios[platdata->cs], 0);
+       dm_gpio_set_value(&priv->gpios[platdata->cs[0]], 0);
 }
 
 static int mpc8xx_spi_xfer_one(struct udevice *dev, size_t count,
index cd624f4d6f0be7eecfe30f8dac78d6d992213285..b34e1c2129c10752ba85a6600565ef708c7af4aa 100644 (file)
@@ -113,7 +113,7 @@ static void mpc8xxx_spi_cs_activate(struct udevice *dev)
        struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
        struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
 
-       dm_gpio_set_value(&priv->gpios[plat->cs], 1);
+       dm_gpio_set_value(&priv->gpios[plat->cs[0]], 1);
 }
 
 static void mpc8xxx_spi_cs_deactivate(struct udevice *dev)
@@ -121,7 +121,7 @@ static void mpc8xxx_spi_cs_deactivate(struct udevice *dev)
        struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
        struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
 
-       dm_gpio_set_value(&priv->gpios[plat->cs], 0);
+       dm_gpio_set_value(&priv->gpios[plat->cs[0]], 0);
 }
 
 static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
@@ -137,10 +137,10 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
        ulong type = dev_get_driver_data(bus);
 
        debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__,
-             bus->name, plat->cs, (uint)dout, (uint)din, bitlen);
-       if (plat->cs >= priv->cs_count) {
+             bus->name, plat->cs[0], (uint)dout, (uint)din, bitlen);
+       if (plat->cs[0] >= priv->cs_count) {
                dev_err(dev, "chip select index %d too large (cs_count=%d)\n",
-                       plat->cs, priv->cs_count);
+                       plat->cs[0], priv->cs_count);
                return -EINVAL;
        }
        if (bitlen % 8) {
index ad4daeba3cd808ef39c3035aa762e819d55f6d47..75ab4ab1dda2a7c3eeaba5bec3a03e5cda022698 100644 (file)
@@ -123,11 +123,11 @@ int mscc_bb_spi_xfer(struct udevice *dev, unsigned int bitlen,
        u8              *rxd = din;
 
        debug("spi_xfer: slave %s:%s cs%d mode %d, dout %p din %p bitlen %u\n",
-             dev->parent->name, dev->name, plat->cs,  plat->mode, dout,
+             dev->parent->name, dev->name, plat->cs[0],  plat->mode, dout,
              din, bitlen);
 
        if (flags & SPI_XFER_BEGIN)
-               mscc_bb_spi_cs_activate(priv, plat->mode, plat->cs);
+               mscc_bb_spi_cs_activate(priv, plat->mode, plat->cs[0]);
 
        count = bitlen / 8;
        for (i = 0; i < count; i++) {
index e7c393ae188f2841500a97b89e84f206ab71b185..9ab39a188b22e64f7bb92a7e54ccbee30c56700e 100644 (file)
@@ -135,7 +135,7 @@ static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs)
        struct udevice *dev = mxcs->dev;
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
 
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
 
        if (!dm_gpio_is_valid(&mxcs->cs_gpios[cs]))
                return;
@@ -153,7 +153,7 @@ static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs)
        struct udevice *dev = mxcs->dev;
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
 
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
 
        if (!dm_gpio_is_valid(&mxcs->cs_gpios[cs]))
                return;
@@ -632,7 +632,7 @@ static int mxc_spi_claim_bus(struct udevice *dev)
 
        mxcs->dev = dev;
 
-       return mxc_spi_claim_bus_internal(mxcs, slave_plat->cs);
+       return mxc_spi_claim_bus_internal(mxcs, slave_plat->cs[0]);
 }
 
 static int mxc_spi_release_bus(struct udevice *dev)
index 73c506442ae29a4f284039cf7ac692d64ea4e08f..7b8271c8bbcc86b039db5167deefb55835d3c9de 100644 (file)
@@ -203,7 +203,7 @@ static int npcm_fiu_spi_xfer(struct udevice *dev, unsigned int bitlen,
        int len;
 
        if (flags & SPI_XFER_BEGIN)
-               activate_cs(regs, slave_plat->cs);
+               activate_cs(regs, slave_plat->cs[0]);
 
        while (bytes) {
                len = (bytes > CHUNK_SIZE) ? CHUNK_SIZE : bytes;
@@ -222,7 +222,7 @@ static int npcm_fiu_spi_xfer(struct udevice *dev, unsigned int bitlen,
        }
 
        if (flags & SPI_XFER_END)
-               deactivate_cs(regs, slave_plat->cs);
+               deactivate_cs(regs, slave_plat->cs[0]);
 
        return ret;
 }
@@ -325,9 +325,9 @@ static int npcm_fiu_exec_op(struct spi_slave *slave,
        bytes = op->data.nbytes;
        addr = (u32)op->addr.val;
        if (!bytes) {
-               activate_cs(regs, slave_plat->cs);
+               activate_cs(regs, slave_plat->cs[0]);
                ret = npcm_fiu_uma_operation(priv, op, addr, NULL, NULL, 0, false);
-               deactivate_cs(regs, slave_plat->cs);
+               deactivate_cs(regs, slave_plat->cs[0]);
                return ret;
        }
 
@@ -339,9 +339,9 @@ static int npcm_fiu_exec_op(struct spi_slave *slave,
         * Use HW-control CS for read to avoid clock and timing issues.
         */
        if (op->data.dir == SPI_MEM_DATA_OUT)
-               activate_cs(regs, slave_plat->cs);
+               activate_cs(regs, slave_plat->cs[0]);
        else
-               writel(FIELD_PREP(UMA_CTS_DEV_NUM_MASK, slave_plat->cs) | UMA_CTS_SW_CS,
+               writel(FIELD_PREP(UMA_CTS_DEV_NUM_MASK, slave_plat->cs[0]) | UMA_CTS_SW_CS,
                       &regs->uma_cts);
        while (bytes) {
                len = (bytes > CHUNK_SIZE) ? CHUNK_SIZE : bytes;
@@ -361,7 +361,7 @@ static int npcm_fiu_exec_op(struct spi_slave *slave,
                        rx += len;
        }
        if (op->data.dir == SPI_MEM_DATA_OUT)
-               deactivate_cs(regs, slave_plat->cs);
+               deactivate_cs(regs, slave_plat->cs[0]);
 
        return 0;
 }
index fefdaaa9e90155deecc3c9388b1df770c8b9e9ee..7489c896f9d5eeea4dd7e9c5101fb877ead82339 100644 (file)
@@ -962,7 +962,7 @@ static int nxp_fspi_claim_bus(struct udevice *dev)
        bus = dev->parent;
        f = dev_get_priv(bus);
 
-       nxp_fspi_select_mem(f, slave_plat->cs);
+       nxp_fspi_select_mem(f, slave_plat->cs[0]);
 
        return 0;
 }
index 4bc38beaa68bae0a96786eccddb566508c81ca71..0e6e0f7dbe74df647d9cfd174503f7bcea6c0b3b 100644 (file)
@@ -93,7 +93,7 @@ static u64 octeon_spi_set_mpicfg(struct udevice *dev)
        if (max_speed > OCTEON_SPI_MAX_CLOCK_HZ)
                max_speed = OCTEON_SPI_MAX_CLOCK_HZ;
 
-       debug("\n slave params %d %d %d\n", slave->cs,
+       debug("\n slave params %d %d %d\n", slave->cs[0],
              slave->max_hz, slave->mode);
        cpha = !!(slave->mode & SPI_CPHA);
        cpol = !!(slave->mode & SPI_CPOL);
index 3d82fc74ff58fee46fc80ad6fb30cca99c34a24a..35bd87660978abdf6bf84ec9add0cb6225856245 100644 (file)
@@ -393,7 +393,7 @@ static int omap3_spi_claim_bus(struct udevice *dev)
        struct omap3_spi_priv *priv = dev_get_priv(bus);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
 
-       priv->cs = slave_plat->cs;
+       priv->cs = slave_plat->cs[0];
        if (!priv->freq)
                priv->freq = slave_plat->max_hz;
 
@@ -422,7 +422,7 @@ static int omap3_spi_set_wordlen(struct udevice *dev, unsigned int wordlen)
        struct omap3_spi_priv *priv = dev_get_priv(bus);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
 
-       priv->cs = slave_plat->cs;
+       priv->cs = slave_plat->cs[0];
        priv->wordlen = wordlen;
        _omap3_spi_set_wordlen(priv);
 
index e11ae7fc7a4a4fb2fecb10c4d66a48b8b1a433f5..c4b31dc2a610b68898ed289a7ecb743b79095caf 100644 (file)
@@ -247,7 +247,7 @@ static int pic32_spi_xfer(struct udevice *slave, unsigned int bitlen,
        slave_plat = dev_get_parent_plat(slave);
 
        debug("spi_xfer: bus:%i cs:%i flags:%lx\n",
-             dev_seq(bus), slave_plat->cs, flags);
+             dev_seq(bus), slave_plat->cs[0], flags);
        debug("msg tx %p, rx %p submitted of %d byte(s)\n",
              tx_buf, rx_buf, len);
 
index 4571dc9f9b697be404bbb23c8690bdb53c1ca58b..2c3d70ba7159c8fced85a676aa754af7470c93a7 100644 (file)
@@ -444,7 +444,7 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
        /* Assert CS before transfer */
        if (flags & SPI_XFER_BEGIN)
-               spi_cs_activate(dev, slave_plat->cs);
+               spi_cs_activate(dev, slave_plat->cs[0]);
 
        /*
         * To ensure fast loading of firmware images (e.g. full U-Boot
@@ -507,7 +507,7 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,
 
        /* Deassert CS after transfer */
        if (flags & SPI_XFER_END)
-               spi_cs_deactivate(dev, slave_plat->cs);
+               spi_cs_deactivate(dev, slave_plat->cs[0]);
 
        rkspi_enable_chip(regs, false);
        if (!out)
index 596c22aa01086aa229d68eb16046e6ceb5a1ffdd..71e9b707e8e37a8e896ae5eacca76c31f8bf37c8 100644 (file)
@@ -409,7 +409,7 @@ static int rockchip_sfc_xfer_setup(struct rockchip_sfc *sfc,
 
        /* set the Controller */
        ctrl |= SFC_CTRL_PHASE_SEL_NEGETIVE;
-       cmd |= plat->cs << SFC_CMD_CS_SHIFT;
+       cmd |= plat->cs[0] << SFC_CMD_CS_SHIFT;
 
        dev_dbg(sfc->dev, "sfc addr.nbytes=%x(x%d) dummy.nbytes=%x(x%d)\n",
                op->addr.nbytes, op->addr.buswidth,
index 12320367e97c1b8a9aa0a246426054d292764abb..ca29cfd7c88930a5761223fb58a75c30b3334324 100644 (file)
@@ -192,7 +192,7 @@ static u32 ast2400_get_clk_setting(struct udevice *dev, uint max_hz)
 
        if (found) {
                hclk_div = hclk_masks[i] << 8;
-               priv->flashes[slave_plat->cs].max_freq = hclk_clk / (i + 1);
+               priv->flashes[slave_plat->cs[0]].max_freq = hclk_clk / (i + 1);
        }
 
        dev_dbg(dev, "found: %s, hclk: %d, max_clk: %d\n", found ? "yes" : "no",
@@ -200,7 +200,7 @@ static u32 ast2400_get_clk_setting(struct udevice *dev, uint max_hz)
 
        if (found) {
                dev_dbg(dev, "h_div: %d (mask %x), speed: %d\n",
-                       i + 1, hclk_masks[i], priv->flashes[slave_plat->cs].max_freq);
+                       i + 1, hclk_masks[i], priv->flashes[slave_plat->cs[0]].max_freq);
        }
 
        return hclk_div;
@@ -311,7 +311,7 @@ static u32 ast2500_get_clk_setting(struct udevice *dev, uint max_hz)
        for (i = 0; i < ARRAY_SIZE(hclk_masks); i++) {
                if (hclk_clk / (i + 1) <= max_hz) {
                        found = true;
-                       priv->flashes[slave_plat->cs].max_freq =
+                       priv->flashes[slave_plat->cs[0]].max_freq =
                                                        hclk_clk / (i + 1);
                        break;
                }
@@ -325,7 +325,7 @@ static u32 ast2500_get_clk_setting(struct udevice *dev, uint max_hz)
        for (i = 0; i < ARRAY_SIZE(hclk_masks); i++) {
                if (hclk_clk / ((i + 1) * 4) <= max_hz) {
                        found = true;
-                       priv->flashes[slave_plat->cs].max_freq =
+                       priv->flashes[slave_plat->cs[0]].max_freq =
                                                hclk_clk / ((i + 1) * 4);
                        break;
                }
@@ -340,7 +340,7 @@ end:
 
        if (found) {
                dev_dbg(dev, "h_div: %d (mask %x), speed: %d\n",
-                       i + 1, hclk_masks[i], priv->flashes[slave_plat->cs].max_freq);
+                       i + 1, hclk_masks[i], priv->flashes[slave_plat->cs[0]].max_freq);
        }
 
        return hclk_div;
@@ -456,7 +456,7 @@ static u32 ast2600_get_clk_setting(struct udevice *dev, uint max_hz)
 
                if (found) {
                        hclk_div = ((j << 24) | hclk_masks[i] << 8);
-                       priv->flashes[slave_plat->cs].max_freq =
+                       priv->flashes[slave_plat->cs[0]].max_freq =
                                                hclk_clk / (i + 1 + j * 16);
                        break;
                }
@@ -467,7 +467,7 @@ static u32 ast2600_get_clk_setting(struct udevice *dev, uint max_hz)
 
        if (found) {
                dev_dbg(dev, "base_clk: %d, h_div: %d (mask %x), speed: %d\n",
-                       j, i + 1, hclk_masks[i], priv->flashes[slave_plat->cs].max_freq);
+                       j, i + 1, hclk_masks[i], priv->flashes[slave_plat->cs[0]].max_freq);
        }
 
        return hclk_div;
@@ -588,7 +588,7 @@ static int aspeed_spi_exec_op_user_mode(struct spi_slave *slave,
        struct udevice *bus = dev->parent;
        struct aspeed_spi_priv *priv = dev_get_priv(bus);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(slave->dev);
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
        u32 ce_ctrl_reg = (u32)&priv->regs->ce_ctrl[cs];
        u32 ce_ctrl_val;
        struct aspeed_spi_flash *flash = &priv->flashes[cs];
@@ -668,7 +668,7 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
        const struct aspeed_spi_info *info = priv->info;
        struct spi_mem_op op_tmpl = desc->info.op_tmpl;
        u32 i;
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
        u32 cmd_io_conf;
        u32 ce_ctrl_reg;
 
@@ -725,7 +725,7 @@ static ssize_t aspeed_spi_dirmap_read(struct spi_mem_dirmap_desc *desc,
        struct udevice *dev = desc->slave->dev;
        struct aspeed_spi_priv *priv = dev_get_priv(dev->parent);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
        int ret;
 
        dev_dbg(dev, "read op:0x%x, addr:0x%llx, len:0x%x\n",
@@ -750,7 +750,7 @@ static struct aspeed_spi_flash *aspeed_spi_get_flash(struct udevice *dev)
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
        struct aspeed_spi_plat *plat = dev_get_plat(bus);
        struct aspeed_spi_priv *priv = dev_get_priv(bus);
-       u32 cs = slave_plat->cs;
+       u32 cs = slave_plat->cs[0];
 
        if (cs >= plat->max_cs) {
                dev_err(dev, "invalid CS %u\n", cs);
@@ -1068,10 +1068,10 @@ static int aspeed_spi_claim_bus(struct udevice *dev)
        struct udevice *bus = dev->parent;
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
        struct aspeed_spi_priv *priv = dev_get_priv(dev->parent);
-       struct aspeed_spi_flash *flash = &priv->flashes[slave_plat->cs];
+       struct aspeed_spi_flash *flash = &priv->flashes[slave_plat->cs[0]];
        u32 clk_setting;
 
-       dev_dbg(bus, "%s: claim bus CS%u\n", bus->name, slave_plat->cs);
+       dev_dbg(bus, "%s: claim bus CS%u\n", bus->name, slave_plat->cs[0]);
 
        if (flash->max_freq == 0) {
                clk_setting = priv->info->get_clk_setting(dev, slave_plat->max_hz);
@@ -1089,7 +1089,7 @@ static int aspeed_spi_release_bus(struct udevice *dev)
        struct udevice *bus = dev->parent;
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
 
-       dev_dbg(bus, "%s: release bus CS%u\n", bus->name, slave_plat->cs);
+       dev_dbg(bus, "%s: release bus CS%u\n", bus->name, slave_plat->cs[0]);
 
        if (!aspeed_spi_get_flash(dev))
                return -ENODEV;
index b98bcd9b6ba5551fe0432108c7d2c2a7b8fa5858..3835865ea7d3517b803d746eeb106e4a1fead5f4 100644 (file)
@@ -366,8 +366,8 @@ static int mxic_spi_mem_exec_op(struct spi_slave *slave,
                nio = 2;
 
        writel(HC_CFG_NIO(nio) |
-              HC_CFG_TYPE(slave_plat->cs, HC_CFG_TYPE_SPI_NOR) |
-              HC_CFG_SLV_ACT(slave_plat->cs) | HC_CFG_IDLE_SIO_LVL(1) |
+              HC_CFG_TYPE(slave_plat->cs[0], HC_CFG_TYPE_SPI_NOR) |
+              HC_CFG_SLV_ACT(slave_plat->cs[0]) | HC_CFG_IDLE_SIO_LVL(1) |
               HC_CFG_MAN_CS_EN,
               priv->regs + HC_CFG);
        writel(HC_EN_BIT, priv->regs + HC_EN);
@@ -396,7 +396,7 @@ static int mxic_spi_mem_exec_op(struct spi_slave *slave,
                        ss_ctrl |= OP_READ;
        }
 
-       writel(ss_ctrl, priv->regs + SS_CTRL(slave_plat->cs));
+       writel(ss_ctrl, priv->regs + SS_CTRL(slave_plat->cs[0]));
 
        writel(readl(priv->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
               priv->regs + HC_CFG);
index 836c550b0bb64bb14ad1ab20c46a835ef0c09194..dc001e6e4cc9a33d8eef90bcb21876ddc55acbd1 100644 (file)
@@ -718,7 +718,7 @@ static int qup_spi_xfer(struct udevice *dev, unsigned int bitlen,
                if (ret != 0)
                        return ret;
 
-               ret = qup_spi_set_cs(bus, slave_plat->cs, false);
+               ret = qup_spi_set_cs(bus, slave_plat->cs[0], false);
                if (ret != 0)
                        return ret;
        }
@@ -736,7 +736,7 @@ static int qup_spi_xfer(struct udevice *dev, unsigned int bitlen,
        }
 
        if (flags & SPI_XFER_END) {
-               ret = qup_spi_set_cs(bus, slave_plat->cs, true);
+               ret = qup_spi_set_cs(bus, slave_plat->cs[0], true);
                if (ret != 0)
                        return ret;
        }
index 0c8666c05f94f49ed95f1460e6fc7a9bb7a1b159..15407d482c9548aa844feefd6d2c544c526ef347 100644 (file)
@@ -108,13 +108,13 @@ static void sifive_spi_prep_device(struct sifive_spi *spi,
 {
        /* Update the chip select polarity */
        if (slave_plat->mode & SPI_CS_HIGH)
-               spi->cs_inactive &= ~BIT(slave_plat->cs);
+               spi->cs_inactive &= ~BIT(slave_plat->cs[0]);
        else
-               spi->cs_inactive |= BIT(slave_plat->cs);
+               spi->cs_inactive |= BIT(slave_plat->cs[0]);
        writel(spi->cs_inactive, spi->regs + SIFIVE_SPI_REG_CSDEF);
 
        /* Select the correct device */
-       writel(slave_plat->cs, spi->regs + SIFIVE_SPI_REG_CSID);
+       writel(slave_plat->cs[0], spi->regs + SIFIVE_SPI_REG_CSID);
 }
 
 static int sifive_spi_set_cs(struct sifive_spi *spi,
index fc82791006ec8de6a63a689ecd7297f6586b9a35..364ba4b3a9753705976095eb68425a031490c226 100644 (file)
@@ -497,7 +497,7 @@ static int f_ospi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
        int err = 0;
 
        slave_plat = dev_get_parent_plat(slave->dev);
-       ospi->chip_select = slave_plat->cs;
+       ospi->chip_select = slave_plat->cs[0];
 
        switch (op->data.dir) {
        case SPI_MEM_DATA_IN:
index 88550b8ea843614c0d49067545b6cd93a0256f29..e00532a371b420d0fe88b337b0fd68ac71ef5bba 100644 (file)
@@ -360,7 +360,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen,
        }
 
        if (flags & SPI_XFER_BEGIN)
-               sun4i_spi_set_cs(bus, slave_plat->cs, true);
+               sun4i_spi_set_cs(bus, slave_plat->cs[0], true);
 
        /* Reset FIFOs */
        setbits_le32(SPI_REG(priv, SPI_FCR), SPI_BIT(priv, SPI_FCR_RF_RST) |
@@ -391,7 +391,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen,
                                        false, SUN4I_SPI_TIMEOUT_MS, false);
                if (ret < 0) {
                        printf("ERROR: sun4i_spi: Timeout transferring data\n");
-                       sun4i_spi_set_cs(bus, slave_plat->cs, false);
+                       sun4i_spi_set_cs(bus, slave_plat->cs[0], false);
                        return ret;
                }
 
@@ -402,7 +402,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen,
        }
 
        if (flags & SPI_XFER_END)
-               sun4i_spi_set_cs(bus, slave_plat->cs, false);
+               sun4i_spi_set_cs(bus, slave_plat->cs[0], false);
 
        return 0;
 }
index eb522fd7b3d99d65a45cad5de6fdce7e70d0de15..a3c0ad17121cdbaa7998acd973bd8be8eb46032a 100644 (file)
@@ -193,12 +193,12 @@ static void synquacer_spi_config(struct udevice *dev, void *rx, const void *tx)
        /* if nothing to do */
        if (slave_plat->mode == priv->mode &&
            rwflag == priv->rwflag &&
-           slave_plat->cs == priv->cs &&
+           slave_plat->cs[0] == priv->cs &&
            slave_plat->max_hz == priv->speed)
                return;
 
        priv->rwflag = rwflag;
-       priv->cs = slave_plat->cs;
+       priv->cs = slave_plat->cs[0];
        priv->mode = slave_plat->mode;
        priv->speed = slave_plat->max_hz;
 
index 6e28172523913ec2808e45125d1fa802aa8226ee..b454c4163cd7c28645a23f78a4fc96c543e236d9 100644 (file)
@@ -224,7 +224,7 @@ int spi_chip_select(struct udevice *dev)
 {
        struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
 
-       return plat ? plat->cs : -ENOENT;
+       return plat ? plat->cs[0] : -ENOENT;
 }
 
 int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp)
@@ -261,8 +261,8 @@ int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp)
                struct dm_spi_slave_plat *plat;
 
                plat = dev_get_parent_plat(dev);
-               dev_dbg(bus, "%s: plat=%p, cs=%d\n", __func__, plat, plat->cs);
-               if (plat->cs == cs) {
+               dev_dbg(bus, "%s: plat=%p, cs=%d\n", __func__, plat, plat->cs[0]);
+               if (plat->cs[0] == cs) {
                        *devp = dev;
                        return 0;
                }
@@ -415,7 +415,7 @@ int _spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
                        return ret;
                }
                plat = dev_get_parent_plat(dev);
-               plat->cs = cs;
+               plat->cs[0] = cs;
                if (speed) {
                        plat->max_hz = speed;
                } else {
@@ -446,6 +446,12 @@ int _spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
        slave = dev_get_parent_priv(dev);
        bus_data = dev_get_uclass_priv(bus);
 
+#if CONFIG_IS_ENABLED(SPI_ADVANCE)
+       if ((dev_read_bool(dev, "parallel-memories")) && !slave->multi_cs_cap) {
+               dev_err(dev, "controller doesn't support multi CS\n");
+               return -EINVAL;
+       }
+#endif
        /*
         * In case the operation speed is not yet established by
         * dm_spi_claim_bus() ensure the bus is configured properly.
@@ -509,7 +515,21 @@ int spi_slave_of_to_plat(struct udevice *dev, struct dm_spi_slave_plat *plat)
        int mode = 0;
        int value;
 
-       plat->cs = dev_read_u32_default(dev, "reg", -1);
+#if CONFIG_IS_ENABLED(SPI_ADVANCE)
+       int ret;
+
+       ret = dev_read_u32_array(dev, "reg", plat->cs, SPI_CS_CNT_MAX);
+
+       if (ret == -EOVERFLOW || ret == -FDT_ERR_BADLAYOUT) {
+               dev_read_u32(dev, "reg", &plat->cs[0]);
+       } else {
+               dev_err(dev, "has no valid 'reg' property (%d)\n", ret);
+               return ret;
+       }
+#else
+       plat->cs[0] = dev_read_u32_default(dev, "reg", -1);
+#endif
+
        plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency",
                                            SPI_DEFAULT_SPEED_HZ);
        if (dev_read_bool(dev, "spi-cpol"))
index 2812a4da4113b92a081a46daff84b6f7a4b2e78c..3216ec8010e275ce28e384c312d54bc6058e02d2 100644 (file)
@@ -394,7 +394,7 @@ static int stm32_qspi_claim_bus(struct udevice *dev)
 {
        struct stm32_qspi_priv *priv = dev_get_priv(dev->parent);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
-       int slave_cs = slave_plat->cs;
+       int slave_cs = slave_plat->cs[0];
 
        if (slave_cs >= STM32_QSPI_MAX_CHIP)
                return -ENODEV;
index 97b83b171670b34804a417e02bca5799a15856c5..a1f31cf653c7358811705be1a4985d7f1b2fadc5 100644 (file)
@@ -434,7 +434,7 @@ static int stm32_spi_xfer(struct udevice *slave, unsigned int bitlen,
 
        slave_plat = dev_get_parent_plat(slave);
        if (flags & SPI_XFER_BEGIN)
-               stm32_spi_set_cs(bus, slave_plat->cs, false);
+               stm32_spi_set_cs(bus, slave_plat->cs[0], false);
 
        /* Be sure to have data in fifo before starting data transfer */
        if (priv->tx_buf)
@@ -485,7 +485,7 @@ static int stm32_spi_xfer(struct udevice *slave, unsigned int bitlen,
        stm32_spi_stopxfer(bus);
 
        if (flags & SPI_XFER_END)
-               stm32_spi_set_cs(bus, slave_plat->cs, true);
+               stm32_spi_set_cs(bus, slave_plat->cs[0], true);
 
        return xfer_status;
 }
index a16412ec6fb9f5b39dd6252b17648efea2774405..1f2494e592c74aa8218a35913a91d27291e89baa 100644 (file)
@@ -163,7 +163,7 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen,
        uchar *rxp = din;
        uint status;
        int timeout;
-       unsigned int cs = slave->cs;
+       unsigned int cs = slave->cs[0];
 
        bus = dev->parent;
        priv = dev_get_priv(bus);
@@ -344,7 +344,7 @@ static int ti_qspi_exec_mem_op(struct spi_slave *slave,
        if (from + op->data.nbytes > priv->mmap_size)
                return -ENOTSUPP;
 
-       ti_qspi_setup_mmap_read(priv, slave_plat->cs, op->cmd.opcode,
+       ti_qspi_setup_mmap_read(priv, slave_plat->cs[0], op->cmd.opcode,
                                op->data.buswidth, op->addr.nbytes,
                                op->dummy.nbytes);
 
@@ -363,7 +363,7 @@ static int ti_qspi_claim_bus(struct udevice *dev)
        bus = dev->parent;
        priv = dev_get_priv(bus);
 
-       if (slave_plat->cs > priv->num_cs) {
+       if (slave_plat->cs[0] > priv->num_cs) {
                debug("invalid qspi chip select\n");
                return -EINVAL;
        }
@@ -371,13 +371,13 @@ static int ti_qspi_claim_bus(struct udevice *dev)
        writel(MM_SWITCH, &priv->base->memswitch);
        if (priv->ctrl_mod_mmap)
                ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap,
-                                      slave_plat->cs, true);
+                                      slave_plat->cs[0], true);
 
        writel(priv->dc, &priv->base->dc);
        writel(0, &priv->base->cmd);
        writel(0, &priv->base->data);
 
-       priv->dc <<= slave_plat->cs * 8;
+       priv->dc <<= slave_plat->cs[0] * 8;
        writel(priv->dc, &priv->base->dc);
 
        return 0;
@@ -395,12 +395,12 @@ static int ti_qspi_release_bus(struct udevice *dev)
        writel(~MM_SWITCH, &priv->base->memswitch);
        if (priv->ctrl_mod_mmap)
                ti_qspi_ctrl_mode_mmap(priv->ctrl_mod_mmap,
-                                      slave_plat->cs, false);
+                                      slave_plat->cs[0], false);
 
        writel(0, &priv->base->dc);
        writel(0, &priv->base->cmd);
        writel(0, &priv->base->data);
-       writel(0, TI_QSPI_SETUP_REG(priv, slave_plat->cs));
+       writel(0, TI_QSPI_SETUP_REG(priv, slave_plat->cs[0]));
 
        return 0;
 }
index 0e7fa3a4525d1092812ea7ea82f0c98160757ff4..b2af17ebae9b2dcc98b07dddca30c54050b64bce 100644 (file)
@@ -291,7 +291,7 @@ static void xilinx_spi_startup_block(struct udevice *dev)
         * Perform a dummy read as a work around for
         * the startup block issue.
         */
-       spi_cs_activate(dev, slave_plat->cs);
+       spi_cs_activate(dev, slave_plat->cs[0]);
        txp = 0x9f;
        start_transfer(dev, (void *)&txp, NULL, 1);
 
@@ -306,7 +306,7 @@ static int xilinx_spi_xfer(struct udevice *dev, unsigned int bitlen,
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
        int ret;
 
-       spi_cs_activate(dev, slave_plat->cs);
+       spi_cs_activate(dev, slave_plat->cs[0]);
        ret = start_transfer(dev, dout, din, bitlen / 8);
        spi_cs_deactivate(dev);
        return ret;
@@ -331,7 +331,7 @@ static int xilinx_spi_mem_exec_op(struct spi_slave *spi,
                startup++;
        }
 
-       spi_cs_activate(spi->dev, slave_plat->cs);
+       spi_cs_activate(spi->dev, slave_plat->cs[0]);
 
        if (op->cmd.opcode) {
                ret = start_transfer(spi->dev, (void *)&op->cmd.opcode,
index b71b9a6fd6c8ed73d182810034ab1057f40dff16..e8bc196ce9eb6ebc75eb07c533affb8060061e8b 100644 (file)
@@ -585,13 +585,13 @@ static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen,
        struct zynq_qspi_priv *priv = dev_get_priv(bus);
        struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
 
-       priv->cs = slave_plat->cs;
+       priv->cs = slave_plat->cs[0];
        priv->tx_buf = dout;
        priv->rx_buf = din;
        priv->len = bitlen / 8;
 
-       debug("zynq_qspi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n",
-             dev_seq(bus), slave_plat->cs, bitlen, priv->len, flags);
+       debug("zynq_qspi_xfer: bus:%i cs[0]:%i bitlen:%i len:%i flags:%lx\n",
+             dev_seq(bus), slave_plat->cs[0], bitlen, priv->len, flags);
 
        /*
         * Festering sore.
index d15d91a1d24228759c85e30875822d3aa32555f5..37fa12b96b5a04cfeec23a8b03cb5536cafea6a6 100644 (file)
@@ -240,15 +240,15 @@ static int zynq_spi_xfer(struct udevice *dev, unsigned int bitlen,
        u8 *rx_buf = din, buf;
        u32 ts, status;
 
-       debug("spi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n",
-             dev_seq(bus), slave_plat->cs, bitlen, len, flags);
+       debug("spi_xfer: bus:%i cs[0]:%i bitlen:%i len:%i flags:%lx\n",
+             dev_seq(bus), slave_plat->cs[0], bitlen, len, flags);
 
        if (bitlen % 8) {
                debug("spi_xfer: Non byte aligned SPI transfer\n");
                return -1;
        }
 
-       priv->cs = slave_plat->cs;
+       priv->cs = slave_plat->cs[0];
        if (flags & SPI_XFER_BEGIN)
                spi_cs_activate(dev);
 
index 6e8e0cce7f25e481b89cf158ce2fea52fdcd35f3..b7148864e78ffdb87cf2391ee3a46a56d5e2c560 100644 (file)
@@ -80,7 +80,7 @@ struct dm_spi_bus {
  * @mode:      SPI mode to use for this device (see SPI mode flags)
  */
 struct dm_spi_slave_plat {
-       unsigned int cs;
+       unsigned int cs[SPI_CS_CNT_MAX];
        uint max_hz;
        uint mode;
 };
@@ -166,6 +166,12 @@ struct spi_slave {
 #define SPI_XFER_ONCE          (SPI_XFER_BEGIN | SPI_XFER_END)
 #define SPI_XFER_U_PAGE                BIT(4)
 #define SPI_XFER_STACKED       BIT(5)
+       /*
+        * Flag indicating that the spi-controller has multi chip select
+        * capability and can assert/de-assert more than one chip select
+        * at once.
+        */
+       bool multi_cs_cap;
 };
 
 /**
index ed94194346d5e0f15cf4a3f78beb5462732e6b3b..0f3044bca79dcad4f11f062dc977b66cbbaeebf0 100644 (file)
@@ -728,7 +728,7 @@ static int acpi_device_set_spi(const struct udevice *dev, struct acpi_spi *spi,
 
        plat = dev_get_parent_plat(slave->dev);
        memset(spi, '\0', sizeof(*spi));
-       spi->device_select = plat->cs;
+       spi->device_select = plat->cs[0];
        spi->device_select_polarity = SPI_POLARITY_LOW;
        spi->wire_mode = SPI_4_WIRE_MODE;
        spi->speed = plat->max_hz;