return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
}
-void get_soc_name(char name[SOC_NAME_SIZE])
+static const char * const soc_type[] = {
+ "????",
+ "151C", "151A", "151F", "151D",
+ "153C", "153A", "153F", "153D",
+ "157C", "157A", "157F", "157D"
+};
+
+static const char * const soc_pkg[] = { "??", "AD", "AC", "AB", "AA" };
+static const char * const soc_rev[] = { "?", "A", "B", "Z" };
+
+static void get_cpu_string_offsets(unsigned int *type, unsigned int *pkg,
+ unsigned int *rev)
{
- char *cpu_s, *cpu_r, *pkg;
+ u32 cpu_type = get_cpu_type();
+ u32 ct = cpu_type & ~(BIT(7) | BIT(0));
+ u32 cm = ((cpu_type & BIT(7)) >> 6) | (cpu_type & BIT(0));
+ u32 cp = get_cpu_package();
- /* MPUs Part Numbers */
- switch (get_cpu_type()) {
- case CPU_STM32MP157Fxx:
- cpu_s = "157F";
- break;
- case CPU_STM32MP157Dxx:
- cpu_s = "157D";
- break;
- case CPU_STM32MP157Cxx:
- cpu_s = "157C";
- break;
- case CPU_STM32MP157Axx:
- cpu_s = "157A";
- break;
- case CPU_STM32MP153Fxx:
- cpu_s = "153F";
- break;
- case CPU_STM32MP153Dxx:
- cpu_s = "153D";
+ /* Bits 0 and 7 are the ACDF, 00:C 01:A 10:F 11:D */
+ switch (ct) {
+ case CPU_STM32MP151Cxx:
+ *type = cm + 1;
break;
case CPU_STM32MP153Cxx:
- cpu_s = "153C";
- break;
- case CPU_STM32MP153Axx:
- cpu_s = "153A";
- break;
- case CPU_STM32MP151Fxx:
- cpu_s = "151F";
- break;
- case CPU_STM32MP151Dxx:
- cpu_s = "151D";
+ *type = cm + 5;
break;
- case CPU_STM32MP151Cxx:
- cpu_s = "151C";
- break;
- case CPU_STM32MP151Axx:
- cpu_s = "151A";
+ case CPU_STM32MP157Cxx:
+ *type = cm + 9;
break;
default:
- cpu_s = "????";
+ *type = 0;
break;
}
/* Package */
- switch (get_cpu_package()) {
+ switch (cp) {
case PKG_AA_LBGA448:
- pkg = "AA";
- break;
case PKG_AB_LBGA354:
- pkg = "AB";
- break;
case PKG_AC_TFBGA361:
- pkg = "AC";
- break;
case PKG_AD_TFBGA257:
- pkg = "AD";
+ *pkg = cp;
break;
default:
- pkg = "??";
+ *pkg = 0;
break;
}
- /* REVISION */
+ /* Revision */
switch (get_cpu_rev()) {
case CPU_REVA:
- cpu_r = "A";
+ *rev = 1;
break;
case CPU_REVB:
- cpu_r = "B";
+ *rev = 2;
break;
case CPU_REVZ:
- cpu_r = "Z";
+ *rev = 3;
break;
default:
- cpu_r = "?";
+ *rev = 0;
break;
}
+}
+
+void get_soc_name(char name[SOC_NAME_SIZE])
+{
+ unsigned int type, pkg, rev;
- snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", cpu_s, pkg, cpu_r);
+ get_cpu_string_offsets(&type, &pkg, &rev);
+
+ snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s",
+ soc_type[type], soc_pkg[pkg], soc_rev[rev]);
}
#if defined(CONFIG_DISPLAY_CPUINFO)
return 0;
}
+static void setup_soc_type_pkg_rev(void)
+{
+ unsigned int type, pkg, rev;
+
+ get_cpu_string_offsets(&type, &pkg, &rev);
+
+ env_set("soc_type", soc_type[type]);
+ env_set("soc_pkg", soc_pkg[pkg]);
+ env_set("soc_rev", soc_rev[rev]);
+}
+
int arch_misc_init(void)
{
setup_boot_mode();
setup_mac_address();
setup_serial_number();
+ setup_soc_type_pkg_rev();
return 0;
}