else
return __get_backup_bootmedia(devstat);
}
-
-#if defined(CONFIG_SYS_K3_SPL_ATF)
-
-#define AM64X_DEV_RTI8 127
-#define AM64X_DEV_RTI9 128
-#define AM64X_DEV_R5FSS0_CORE0 121
-#define AM64X_DEV_R5FSS0_CORE1 122
-
-void release_resources_for_core_shutdown(void)
-{
- struct ti_sci_handle *ti_sci = get_ti_sci_handle();
- struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
- struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
- int ret;
- u32 i;
-
- const u32 put_device_ids[] = {
- AM64X_DEV_RTI9,
- AM64X_DEV_RTI8,
- };
-
- /* Iterate through list of devices to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
- u32 id = put_device_ids[i];
-
- ret = dev_ops->put_device(ti_sci, id);
- if (ret)
- panic("Failed to put device %u (%d)\n", id, ret);
- }
-
- const u32 put_core_ids[] = {
- AM64X_DEV_R5FSS0_CORE1,
- AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
- };
-
- /* Iterate through list of cores to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
- u32 id = put_core_ids[i];
-
- /*
- * Queue up the core shutdown request. Note that this call
- * needs to be followed up by an actual invocation of an WFE
- * or WFI CPU instruction.
- */
- ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
- if (ret)
- panic("Failed sending core %u shutdown message (%d)\n",
- id, ret);
- }
-}
-#endif
else
return __get_backup_bootmedia(devstat);
}
-
-#ifdef CONFIG_SYS_K3_SPL_ATF
-
-#define AM6_DEV_MCU_RTI0 134
-#define AM6_DEV_MCU_RTI1 135
-#define AM6_DEV_MCU_ARMSS0_CPU0 159
-#define AM6_DEV_MCU_ARMSS0_CPU1 245
-
-void release_resources_for_core_shutdown(void)
-{
- struct ti_sci_handle *ti_sci = get_ti_sci_handle();
- struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
- struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
- int ret;
- u32 i;
-
- const u32 put_device_ids[] = {
- AM6_DEV_MCU_RTI0,
- AM6_DEV_MCU_RTI1,
- };
-
- /* Iterate through list of devices to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
- u32 id = put_device_ids[i];
-
- ret = dev_ops->put_device(ti_sci, id);
- if (ret)
- panic("Failed to put device %u (%d)\n", id, ret);
- }
-
- const u32 put_core_ids[] = {
- AM6_DEV_MCU_ARMSS0_CPU1,
- AM6_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
- };
-
- /* Iterate through list of cores to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
- u32 id = put_core_ids[i];
-
- /*
- * Queue up the core shutdown request. Note that this call
- * needs to be followed up by an actual invocation of an WFE
- * or WFI CPU instruction.
- */
- ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
- if (ret)
- panic("Failed sending core %u shutdown message (%d)\n",
- id, ret);
- }
-}
-#endif
return size;
}
-__weak void release_resources_for_core_shutdown(void)
+void release_resources_for_core_shutdown(void)
{
- debug("%s not implemented...\n", __func__);
+ struct ti_sci_handle *ti_sci = get_ti_sci_handle();
+ struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
+ struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
+ int ret;
+ u32 i;
+
+ /* Iterate through list of devices to put (shutdown) */
+ for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
+ u32 id = put_device_ids[i];
+
+ ret = dev_ops->put_device(ti_sci, id);
+ if (ret)
+ panic("Failed to put device %u (%d)\n", id, ret);
+ }
+
+ /* Iterate through list of cores to put (shutdown) */
+ for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
+ u32 id = put_core_ids[i];
+
+ /*
+ * Queue up the core shutdown request. Note that this call
+ * needs to be followed up by an actual invocation of an WFE
+ * or WFI CPU instruction.
+ */
+ ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
+ if (ret)
+ panic("Failed sending core %u shutdown message (%d)\n",
+ id, ret);
+ }
}
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+static const u32 put_device_ids[] = {};
+
+static const u32 put_core_ids[] = {};
+
+#endif
+
#endif /* __ASM_ARCH_AM62_HARDWARE_H */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x70000001
#endif /* CONFIG_CPU_V7R */
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+static const u32 put_device_ids[] = {};
+
+static const u32 put_core_ids[] = {};
+
+#endif
+
#endif /* __ASM_ARCH_AM62A_HARDWARE_H */
#ifndef __ASM_ARCH_AM64_HARDWARE_H
#define __ASM_ARCH_AM64_HARDWARE_H
+#include <config.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
#define PADCFG_MMR1_BASE 0x000f0000
#define MCU_PADCFG_MMR1_BASE 0x04080000
#define WKUP_CTRL_MMR0_BASE 0x43000000
/* Use Last 2K as Scratch pad */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x7019f800
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define AM64X_DEV_RTI8 127
+#define AM64X_DEV_RTI9 128
+#define AM64X_DEV_R5FSS0_CORE0 121
+#define AM64X_DEV_R5FSS0_CORE1 122
+
+static const u32 put_device_ids[] = {
+ AM64X_DEV_RTI9,
+ AM64X_DEV_RTI8,
+};
+
+static const u32 put_core_ids[] = {
+ AM64X_DEV_R5FSS0_CORE1,
+ AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_DRA8_HARDWARE_H */
#define NAVSS_NBSS_THREADMAP 0x10
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define AM6_DEV_MCU_RTI0 134
+#define AM6_DEV_MCU_RTI1 135
+#define AM6_DEV_MCU_ARMSS0_CPU0 159
+#define AM6_DEV_MCU_ARMSS0_CPU1 245
+
+static const u32 put_device_ids[] = {
+ AM6_DEV_MCU_RTI0,
+ AM6_DEV_MCU_RTI1,
+};
+
+static const u32 put_core_ids[] = {
+ AM6_DEV_MCU_ARMSS0_CPU1,
+ AM6_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_AM6_HARDWARE_H */
/* MCU SCRATCHPAD usage */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define J721E_DEV_MCU_RTI0 262
+#define J721E_DEV_MCU_RTI1 263
+#define J721E_DEV_MCU_ARMSS0_CPU0 250
+#define J721E_DEV_MCU_ARMSS0_CPU1 251
+
+static const u32 put_device_ids[] = {
+ J721E_DEV_MCU_RTI0,
+ J721E_DEV_MCU_RTI1,
+};
+
+static const u32 put_core_ids[] = {
+ J721E_DEV_MCU_ARMSS0_CPU1,
+ J721E_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_J721E_HARDWARE_H */
/* MCU SCRATCHPAD usage */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define J721S2_DEV_MCU_RTI0 295
+#define J721S2_DEV_MCU_RTI1 296
+#define J721S2_DEV_MCU_ARMSS0_CPU0 284
+#define J721S2_DEV_MCU_ARMSS0_CPU1 285
+
+static const u32 put_device_ids[] = {
+ J721S2_DEV_MCU_RTI0,
+ J721S2_DEV_MCU_RTI1,
+};
+
+static const u32 put_core_ids[] = {
+ J721S2_DEV_MCU_ARMSS0_CPU1,
+ J721S2_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_J721S2_HARDWARE_H */
u32 bound);
struct ti_sci_handle *get_ti_sci_handle(void);
int do_board_detect(void);
-void release_resources_for_core_shutdown(void);
int fdt_disable_node(void *blob, char *node_path);
void k3_spl_init(void);
else
return __get_backup_bootmedia(main_devstat);
}
-
-#ifdef CONFIG_SYS_K3_SPL_ATF
-
-#define J721E_DEV_MCU_RTI0 262
-#define J721E_DEV_MCU_RTI1 263
-#define J721E_DEV_MCU_ARMSS0_CPU0 250
-#define J721E_DEV_MCU_ARMSS0_CPU1 251
-
-void release_resources_for_core_shutdown(void)
-{
- struct ti_sci_handle *ti_sci;
- struct ti_sci_dev_ops *dev_ops;
- struct ti_sci_proc_ops *proc_ops;
- int ret;
- u32 i;
-
- const u32 put_device_ids[] = {
- J721E_DEV_MCU_RTI0,
- J721E_DEV_MCU_RTI1,
- };
-
- ti_sci = get_ti_sci_handle();
- dev_ops = &ti_sci->ops.dev_ops;
- proc_ops = &ti_sci->ops.proc_ops;
-
- /* Iterate through list of devices to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
- u32 id = put_device_ids[i];
-
- ret = dev_ops->put_device(ti_sci, id);
- if (ret)
- panic("Failed to put device %u (%d)\n", id, ret);
- }
-
- const u32 put_core_ids[] = {
- J721E_DEV_MCU_ARMSS0_CPU1,
- J721E_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
- };
-
- /* Iterate through list of cores to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
- u32 id = put_core_ids[i];
-
- /*
- * Queue up the core shutdown request. Note that this call
- * needs to be followed up by an actual invocation of an WFE
- * or WFI CPU instruction.
- */
- ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
- if (ret)
- panic("Failed sending core %u shutdown message (%d)\n",
- id, ret);
- }
-}
-#endif
else
return __get_backup_bootmedia(main_devstat);
}
-
-#define J721S2_DEV_MCU_RTI0 295
-#define J721S2_DEV_MCU_RTI1 296
-#define J721S2_DEV_MCU_ARMSS0_CPU0 284
-#define J721S2_DEV_MCU_ARMSS0_CPU1 285
-
-void release_resources_for_core_shutdown(void)
-{
- if (IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)) {
- struct ti_sci_handle *ti_sci;
- struct ti_sci_dev_ops *dev_ops;
- struct ti_sci_proc_ops *proc_ops;
- int ret;
- u32 i;
-
- const u32 put_device_ids[] = {
- J721S2_DEV_MCU_RTI0,
- J721S2_DEV_MCU_RTI1,
- };
-
- ti_sci = get_ti_sci_handle();
- dev_ops = &ti_sci->ops.dev_ops;
- proc_ops = &ti_sci->ops.proc_ops;
-
- /* Iterate through list of devices to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
- u32 id = put_device_ids[i];
-
- ret = dev_ops->put_device(ti_sci, id);
- if (ret)
- panic("Failed to put device %u (%d)\n", id, ret);
- }
-
- const u32 put_core_ids[] = {
- J721S2_DEV_MCU_ARMSS0_CPU1,
- J721S2_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
- };
-
- /* Iterate through list of cores to put (shutdown) */
- for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
- u32 id = put_core_ids[i];
-
- /*
- * Queue up the core shutdown request. Note that this call
- * needs to be followed up by an actual invocation of an WFE
- * or WFI CPU instruction.
- */
- ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
- if (ret)
- panic("Failed sending core %u shutdown message (%d)\n",
- id, ret);
- }
- }
-}
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