]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arch: arm: dts: ls1046a: sync serial nodes with Linux
authorCamelia Groza <camelia.groza@nxp.com>
Fri, 16 Jun 2023 13:18:35 +0000 (16:18 +0300)
committerPeng Fan <peng.fan@nxp.com>
Thu, 6 Jul 2023 05:04:55 +0000 (13:04 +0800)
Pick up the serial node descriptions from Linux v6.3 for the ls1046ardb
and ls1046afrwy boards and their dependencies. Including the
fsl,qoriq-clockgen.h and arm-gic.h headers forces us to change the include
directives to explicitly go through the C preprocessor for all boards in
the ls1046a SoC family.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
arch/arm/dts/fsl-ls1046a-frwy.dts
arch/arm/dts/fsl-ls1046a-qds.dtsi
arch/arm/dts/fsl-ls1046a-rdb.dts
arch/arm/dts/fsl-ls1046a.dtsi

index 1e656d4960255ec7b6f1048802b88247a1a16396..ba10d212f1ade8f2a6e44cd4f8b022dbc63291a6 100644 (file)
@@ -7,17 +7,37 @@
  */
 
 /dts-v1/;
-/include/ "fsl-ls1046a.dtsi"
+#include "fsl-ls1046a.dtsi"
 
 / {
        model = "LS1046A FRWY Board";
 
        aliases {
                spi0 = &qspi;
+               serial0 = &duart0;
+               serial1 = &duart1;
+               serial2 = &duart2;
+               serial3 = &duart3;
        };
 
 };
 
+&duart0 {
+       status = "okay";
+};
+
+&duart1 {
+       status = "okay";
+};
+
+&duart2 {
+       status = "okay";
+};
+
+&duart3 {
+       status = "okay";
+};
+
 &qspi {
        status = "okay";
 
index fec5c8ddb23ac2e3968fbcc8081e9a3d60b3f5ab..d66824975c5ea15ebf79dba115df9e5d65d7a329 100644 (file)
@@ -7,7 +7,7 @@
  * Mingkai Hu <Mingkai.hu@nxp.com>
  */
 
-/include/ "fsl-ls1046a.dtsi"
+#include "fsl-ls1046a.dtsi"
 
 / {
        model = "LS1046A QDS Board";
index 464129291c91d43fb86a4a7c8e1e1fe3a193bb06..66d718905c7de2d5d7e3781d09b5be516f1bf0ae 100644 (file)
@@ -9,17 +9,29 @@
  */
 
 /dts-v1/;
-/include/ "fsl-ls1046a.dtsi"
+#include "fsl-ls1046a.dtsi"
 
 / {
        model = "LS1046A RDB Board";
 
        aliases {
                spi0 = &qspi;
+               serial0 = &duart0;
+               serial1 = &duart1;
+               serial2 = &duart2;
+               serial3 = &duart3;
        };
 
 };
 
+&duart0 {
+       status = "okay";
+};
+
+&duart1 {
+       status = "okay";
+};
+
 &qspi {
        status = "okay";
 
index 060dc399c2f6b939ae9c501514951b9c8c4f2df4..44ee4c5808da866d332bf060478de4d20be99b0a 100644 (file)
@@ -8,7 +8,9 @@
  * Mingkai Hu <mingkai.hu@nxp.com>
  */
 
-/include/ "skeleton64.dtsi"
+#include "skeleton64.dtsi"
+#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
        compatible = "fsl,ls1046a";
                duart0: serial@21c0500 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x00 0x21c0500 0x0 0x100>;
-                       interrupts = <0 54 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(2)>;
+                       status = "disabled";
                };
 
                duart1: serial@21c0600 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x00 0x21c0600 0x0 0x100>;
-                       interrupts = <0 54 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(2)>;
+                       status = "disabled";
                };
 
                duart2: serial@21d0500 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x0 0x21d0500 0x0 0x100>;
-                       interrupts = <0 55 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(2)>;
+                       status = "disabled";
                };
 
                duart3: serial@21d0600 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x0 0x21d0600 0x0 0x100>;
-                       interrupts = <0 55 0x4>;
-                       clocks = <&clockgen 4 0>;
+                       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(2)>;
+                       status = "disabled";
                };
 
                lpuart0: serial@2950000 {