ram: stm32_sdram: Adds stm32f429-disco fixes for HardFault at booting

- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000

Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>

diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
index 8a0f642a937368717698d6fab05802fcf82a96fd..10e09508aa213999990b19daf49bf797d7f0ddc6 100644 (file)
--- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
@@ -37,6 +37,8 @@
                        clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>;
                        pinctrl-0 = <&fmc_pins>;
                        pinctrl-names = "default";
+                       st,syscfg = <&syscfg>;
+                       st,swp_fmc = <1>;
                        u-boot,dm-pre-reloc;
 
                        /*

diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index dc39f33d16a7745ccfedf571cac975bab2656b7c..f6cac8eb90bfd542f70b07862a1e6e07808befb4 100644 (file)
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -11,6 +11,8 @@
 #include <asm/io.h>
 
 #define MEM_MODE_MASK  GENMASK(2, 0)
+#define SWP_FMC_OFFSET 10
+#define SWP_FMC_MASK   GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET)
 #define NOT_FOUND      0xff
 
 struct stm32_fmc_regs {
@@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
        struct ofnode_phandle_args args;
        u32 *syscfg_base;
        u32 mem_remap;
+       u32 swp_fmc;
        ofnode bank_node;
        char *bank_name;
        u8 bank = 0;
        int ret;
 
-       mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
-       if (mem_remap != NOT_FOUND) {
-               ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
+       ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
                                                 &args);
-               if (ret) {
-                       debug("%s: can't find syscon device (%d)\n", __func__,
-                             ret);
-                       return ret;
-               }
-
+       if (ret) {
+               dev_dbg(dev, "%s: can't find syscon device (%d)\n", __func__, ret);
+       } else {
                syscfg_base = (u32 *)ofnode_get_addr(args.node);
 
-               /* set memory mapping selection */
-               clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);
-       } else {
-               debug("%s: cannot find st,mem_remap property\n", __func__);
+               mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
+               if (mem_remap != NOT_FOUND) {
+                       /* set memory mapping selection */
+                       clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);
+               } else {
+                       dev_dbg(dev, "%s: cannot find st,mem_remap property\n", __func__);
+               }
+               
+               swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND);
+               if (swp_fmc != NOT_FOUND) {
+                       /* set fmc swapping selection */
+                       clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET);
+               } else {
+                       dev_dbg(dev, "%s: cannot find st,swp_fmc property\n", __func__);
+               }
+
+               dev_dbg(dev, "syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base);
        }
 
        dev_for_each_subnode(bank_node, dev) {

diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h
index 4fd9c23e4e9aadc7b16c68d94b6fc6d8080aeeb9..46eda1d51829297fb8d73b092c8a46325e844040 100644 (file)
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -22,10 +22,10 @@
 #define CONFIG_NR_DRAM_BANKS           1
 #define CONFIG_SYS_RAM_CS              1
 #define CONFIG_SYS_RAM_FREQ_DIV                2
-#define CONFIG_SYS_RAM_BASE            0xD0000000
+#define CONFIG_SYS_RAM_BASE            0x90000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_RAM_BASE
-#define CONFIG_SYS_LOAD_ADDR           0xD0400000
-#define CONFIG_LOADADDR                        0xD0400000
+#define CONFIG_SYS_LOAD_ADDR           0x90400000
+#define CONFIG_LOADADDR                        0x90400000
 
 #define CONFIG_SYS_MAX_FLASH_SECT      12
 #define CONFIG_SYS_MAX_FLASH_BANKS     2