config MVEBU_SPL_BOOT_DEVICE_SPI
bool "SPI NOR flash"
imply ENV_IS_IN_SPI_FLASH
- select SPL_DM_SPI
- select SPL_SPI_FLASH_SUPPORT
- select SPL_SPI_LOAD
- select SPL_SPI_SUPPORT
+ imply SPL_DM_SPI
+ imply SPL_SPI_FLASH_SUPPORT
+ imply SPL_SPI_LOAD
+ imply SPL_SPI_SUPPORT
select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_MMC
bool "SDIO/MMC card"
imply ENV_IS_IN_MMC
# GPIO needed for eMMC/SD card presence detection
- select SPL_DM_GPIO
- select SPL_DM_MMC
- select SPL_GPIO
- select SPL_LIBDISK_SUPPORT
- select SPL_MMC_SUPPORT
+ imply SPL_DM_GPIO
+ imply SPL_DM_MMC
+ imply SPL_GPIO
+ imply SPL_LIBDISK_SUPPORT
+ imply SPL_MMC_SUPPORT
select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_SATA
bool "SATA"
- select SPL_SATA_SUPPORT
- select SPL_LIBDISK_SUPPORT
+ imply SPL_SATA_SUPPORT
+ imply SPL_LIBDISK_SUPPORT
select SPL_BOOTROM_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_UART
#include <debug_uart.h>
#include <fdtdec.h>
#include <hang.h>
+#include <image.h>
#include <init.h>
#include <log.h>
#include <spl.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) || defined(CONFIG_SPL_MMC_SUPPORT) || defined(CONFIG_SPL_SATA_SUPPORT)
+
+/*
+ * When loading U-Boot via SPL from SPI NOR, CONFIG_SYS_SPI_U_BOOT_OFFS must
+ * point to the offset of kwbimage main header which is always at offset zero
+ * (defined by BootROM). Therefore other values of CONFIG_SYS_SPI_U_BOOT_OFFS
+ * makes U-Boot non-bootable.
+ */
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) && CONFIG_SYS_SPI_U_BOOT_OFFS != 0
+#error CONFIG_SYS_SPI_U_BOOT_OFFS must be set to 0
+#endif
+#endif
+
+/*
+ * When loading U-Boot via SPL from eMMC (in Marvell terminology SDIO), the
+ * kwbimage main header is stored at sector 0. U-Boot SPL needs to parse this
+ * header and figure out at which sector the U-Boot proper binary is stored.
+ * Partition booting is therefore not supported and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
+ * and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET need to point to the
+ * kwbimage main header.
+ */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is unsupported
+#endif
+#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR != 0
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0
+#endif
+#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) && CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0
+#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0
+#endif
+#endif
+
+/*
+ * When loading U-Boot via SPL from SATA disk, the kwbimage main header is
+ * stored at sector 1. Therefore CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be
+ * set to 1. Otherwise U-Boot SPL would not be able to load U-Boot proper.
+ */
+#ifdef CONFIG_SPL_SATA_SUPPORT
+#if !defined(CONFIG_SPL_SATA_RAW_U_BOOT_USE_SECTOR) || !defined(CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR) || CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR != 1
+#error CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR must be set to 1
+#endif
+#endif
+
+/* Boot Type - block ID */
+#define IBR_HDR_I2C_ID 0x4D
+#define IBR_HDR_SPI_ID 0x5A
+#define IBR_HDR_NAND_ID 0x8B
+#define IBR_HDR_SATA_ID 0x78
+#define IBR_HDR_PEX_ID 0x9C
+#define IBR_HDR_UART_ID 0x69
+#define IBR_HDR_SDIO_ID 0xAE
+
+/* Structure of the main header, version 1 (Armada 370/38x/XP) */
+struct kwbimage_main_hdr_v1 {
+ uint8_t blockid; /* 0x0 */
+ uint8_t flags; /* 0x1 */
+ uint16_t reserved2; /* 0x2-0x3 */
+ uint32_t blocksize; /* 0x4-0x7 */
+ uint8_t version; /* 0x8 */
+ uint8_t headersz_msb; /* 0x9 */
+ uint16_t headersz_lsb; /* 0xA-0xB */
+ uint32_t srcaddr; /* 0xC-0xF */
+ uint32_t destaddr; /* 0x10-0x13 */
+ uint32_t execaddr; /* 0x14-0x17 */
+ uint8_t options; /* 0x18 */
+ uint8_t nandblocksize; /* 0x19 */
+ uint8_t nandbadblklocation; /* 0x1A */
+ uint8_t reserved4; /* 0x1B */
+ uint16_t reserved5; /* 0x1C-0x1D */
+ uint8_t ext; /* 0x1E */
+ uint8_t checksum; /* 0x1F */
+} __packed;
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+u32 spl_mmc_boot_mode(const u32 boot_device)
+{
+ return MMCSD_MODE_RAW;
+}
+#endif
+
+int spl_parse_board_header(struct spl_image_info *spl_image,
+ const void *image_header, size_t size)
+{
+ const struct kwbimage_main_hdr_v1 *mhdr = image_header;
+
+ if (size < sizeof(*mhdr)) {
+ /* This should be compile time assert */
+ printf("FATAL ERROR: Image header size is too small\n");
+ hang();
+ }
+
+ /*
+ * Very basic check for image validity. We cannot check mhdr->checksum
+ * as it is calculated also from variable length extended headers
+ * (including SPL content) which is not included in U-Boot image_header.
+ */
+ if (mhdr->version != 1 ||
+ ((mhdr->headersz_msb << 16) | mhdr->headersz_lsb) < sizeof(*mhdr) ||
+ (
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+ mhdr->blockid != IBR_HDR_SPI_ID &&
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ mhdr->blockid != IBR_HDR_SATA_ID &&
+#endif
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ mhdr->blockid != IBR_HDR_SDIO_ID &&
+#endif
+ 1
+ )) {
+ printf("ERROR: Not valid SPI/NAND/SATA/SDIO kwbimage v1\n");
+ return -EINVAL;
+ }
+
+ spl_image->offset = mhdr->srcaddr;
+
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ /*
+ * For SATA srcaddr is specified in number of sectors.
+ * The main header is must be stored at sector number 1.
+ * This expects that sector size is 512 bytes and recalculates
+ * data offset to bytes relative to the main header.
+ */
+ if (mhdr->blockid == IBR_HDR_SATA_ID) {
+ if (spl_image->offset < 1) {
+ printf("ERROR: Wrong SATA srcaddr in kwbimage\n");
+ return -EINVAL;
+ }
+ spl_image->offset -= 1;
+ spl_image->offset *= 512;
+ }
+#endif
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ /*
+ * For SDIO (eMMC) srcaddr is specified in number of sectors.
+ * This expects that sector size is 512 bytes and recalculates
+ * data offset to bytes.
+ */
+ if (mhdr->blockid == IBR_HDR_SDIO_ID)
+ spl_image->offset *= 512;
+#endif
+
+ spl_image->size = mhdr->blocksize;
+ spl_image->entry_point = mhdr->execaddr;
+ spl_image->load_addr = mhdr->destaddr;
+ spl_image->os = IH_OS_U_BOOT;
+ spl_image->name = "U-Boot";
+
+ return 0;
+}
+
static u32 get_boot_device(void)
{
u32 val;
boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
switch (boot_device) {
-#if defined(CONFIG_ARMADA_38X)
+#ifdef BOOT_FROM_NAND
case BOOT_FROM_NAND:
return BOOT_DEVICE_NAND;
#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef BOOT_FROM_MMC
case BOOT_FROM_MMC:
case BOOT_FROM_MMC_ALT:
return BOOT_DEVICE_MMC1;
return BOOT_DEVICE_SATA;
#endif
case BOOT_FROM_SPI:
- default:
return BOOT_DEVICE_SPI;
+ default:
+ return BOOT_DEVICE_BOOTROM;
};
}
+#else
+
+static u32 get_boot_device(void)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
+
+#endif
+
u32 spl_boot_device(void)
{
u32 boot_device = get_boot_device();
+ switch (boot_device) {
/*
* Return to the BootROM to continue the Marvell xmodem
* UART boot protocol. As initiated by the kwboot tool.
* SPL has no chance to receive this information. So we
* need to return to the BootROM to enable this xmodem
* UART download. Use SPL infrastructure to return to BootROM.
- *
- * If booting from NAND lets let the BootROM load the
- * rest of the bootloader.
*/
- switch (boot_device) {
case BOOT_DEVICE_UART:
-#if defined(CONFIG_ARMADA_38X)
- case BOOT_DEVICE_NAND:
-#endif
return BOOT_DEVICE_BOOTROM;
+
+ /*
+ * If SPL is compiled with chosen boot_device support
+ * then use SPL driver for loading U-Boot proper.
+ */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+ case BOOT_DEVICE_MMC1:
+ return BOOT_DEVICE_MMC1;
+#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ case BOOT_FROM_SATA:
+ return BOOT_FROM_SATA;
+#endif
+#ifdef CONFIG_SPL_SPI_FLASH_SUPPORT
+ case BOOT_DEVICE_SPI:
+ return BOOT_DEVICE_SPI;
+#endif
+
+ /*
+ * If SPL is not compiled with chosen boot_device support
+ * then return to the BootROM. BootROM supports loading
+ * U-Boot proper from any valid boot_device present in SAR
+ * register.
+ */
default:
- return boot_device;
+ return BOOT_DEVICE_BOOTROM;
}
}
# Use optimistic 64 KiB erase block, will vary between actual media
default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
-config SYS_SPI_U_BOOT_OFFS
- hex "address of u-boot payload in SPI flash"
- default 0x20000
- depends on MVEBU_SPL_BOOT_DEVICE_SPI
-
endmenu
# Use optimistic 64 KiB erase block, will vary between actual media
default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
-config SYS_SPI_U_BOOT_OFFS
- hex "address of u-boot payload in SPI flash"
- default 0x20000
- depends on MVEBU_SPL_BOOT_DEVICE_SPI
-
endmenu
default 0x75 if ARCH_DAVINCI
default 0x8a if ARCH_MX6 || ARCH_MX7
default 0x100 if ARCH_UNIPHIER
- default 0x140 if ARCH_MVEBU
+ default 0x0 if ARCH_MVEBU
default 0x200 if ARCH_SOCFPGA || ARCH_AT91
default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
OMAP54XX || AM33XX || AM43XX || ARCH_K3
config SPL_SATA_RAW_U_BOOT_USE_SECTOR
bool "SATA raw mode: by sector"
depends on SPL_SATA_SUPPORT
+ default y if ARCH_MVEBU
help
Use sector number for specifying U-Boot location on SATA disk in
raw mode.
config SPL_SATA_RAW_U_BOOT_SECTOR
hex "Sector on the SATA disk to load U-Boot from"
depends on SPL_SATA_RAW_U_BOOT_USE_SECTOR
+ default 0x1 if ARCH_MVEBU
help
Sector on the SATA disk to load U-Boot from, when the SATA disk is being
used in raw mode. Units: SATA disk sectors (1 sector = 512 bytes).
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
CONFIG_SPL_I2C=y
CONFIG_CMD_TLV_EEPROM=y
CONFIG_SPL_CMD_TLV_EEPROM=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc"
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc"
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SPL_I2C=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x7E0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x1
CONFIG_SPL_I2C=y
CONFIG_CMD_TLV_EEPROM=y
CONFIG_SPL_CMD_TLV_EEPROM=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xF0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia"
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530"
CONFIG_SPL_TEXT_BASE=0x40000030
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x20000
#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
/* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x30000
#endif
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
+#define CONFIG_SYS_U_BOOT_OFFS (168 << 10)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x20000
#endif /* _CONFIG_DB_88F6720_H */
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x24000
#endif
/*
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x24000
#endif
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
/* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x20000
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_SPD_EEPROM 0x4e
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x24000
#endif
/* DS414 bus width is 32bits */
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x20000
#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
/* SPL related MMC defines */
-#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
#ifdef CONFIG_SPL_BUILD
#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
#endif
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x1a000
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
/* SPL related SPI defines */
-# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+# define CONFIG_SYS_U_BOOT_OFFS 0x24000
#endif
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
/* SPL related MMC defines */
-# define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
-# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
+# define CONFIG_SYS_U_BOOT_OFFS (160 << 10)
# ifdef CONFIG_SPL_BUILD
# define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
# endif
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_U_BOOT_OFFS 0x24000
#endif /* _CONFIG_X530_H */
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