]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: tegra: Rename pcie-controller to pcie
authorThierry Reding <treding@nvidia.com>
Mon, 15 Apr 2019 09:32:37 +0000 (11:32 +0200)
committerTom Warren <twarren@nvidia.com>
Wed, 5 Jun 2019 16:16:35 +0000 (09:16 -0700)
Recent versions of DTC have checks for PCI host bridge device tree nodes
that are named something other than "pci" or "pcie". Fix all occurrences
of such nodes for Tegra boards to avoid potential warnings from DTC.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
16 files changed:
arch/arm/dts/tegra124-apalis.dts
arch/arm/dts/tegra124-cei-tk1-som.dts
arch/arm/dts/tegra124-jetson-tk1.dts
arch/arm/dts/tegra124.dtsi
arch/arm/dts/tegra186-p2771-0000-000.dts
arch/arm/dts/tegra186-p2771-0000-500.dts
arch/arm/dts/tegra186.dtsi
arch/arm/dts/tegra20-harmony.dts
arch/arm/dts/tegra20-trimslice.dts
arch/arm/dts/tegra20.dtsi
arch/arm/dts/tegra210-p2371-2180.dts
arch/arm/dts/tegra210.dtsi
arch/arm/dts/tegra30-apalis.dts
arch/arm/dts/tegra30-beaver.dts
arch/arm/dts/tegra30-cardhu.dts
arch/arm/dts/tegra30.dtsi

index fe08d3ea7304901d6af33ed57e12571c78d2f0db..a962c0a2f0ae10a34840a9dd2c5087da4ef463e0 100644 (file)
@@ -77,7 +77,7 @@
                reg = <0x0 0x80000000 0x0 0x80000000>;
        };
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                status = "okay";
                avddio-pex-supply = <&vdd_1v05>;
                avdd-pex-pll-supply = <&vdd_1v05>;
index b1dd4181ac038e5a1aa5cb48f2b53687185719cc..e5b41f3183cd98b02bc2c09bcd06368e81b8a57e 100644 (file)
@@ -29,7 +29,7 @@
                reg = <0x80000000 0x80000000>;
        };
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                status = "okay";
 
                avddio-pex-supply = <&vdd_1v05_run>;
index d6420436cde823469d6b71b5d6008f51e7c5b66b..59e080a8af6f6346a4d8677ac7a7fa032cdc27dc 100644 (file)
@@ -29,7 +29,7 @@
                reg = <0x80000000 0x80000000>;
        };
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                status = "okay";
 
                avddio-pex-supply = <&vdd_1v05_run>;
index 83d63480471ba07173f44187f0ec5791fa6f8df1..f473ba28e4a645e3b588436ad9bc2b8c8b479b37 100644 (file)
@@ -14,7 +14,7 @@
        interrupt-parent = <&lic>;
 
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                compatible = "nvidia,tegra124-pcie";
                device_type = "pci";
                reg = <0x01003000 0x00000800   /* PADS registers */
index d97c6fd3d09a61bca6277d968e3838239f45aafe..84e850d6fca6d6675eadcb1a61d9dea7ebe205ee 100644 (file)
@@ -11,7 +11,7 @@
                power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>;
        };
 
-       pcie-controller@10003000 {
+       pcie@10003000 {
                status = "okay";
 
                pci@1,0 {
index 393a8b246a0bd47a76c4a17db4d17709e64d7a5c..1ac8ab431e9017b3c0e7735668e6835c9a022722 100644 (file)
@@ -11,7 +11,7 @@
                power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
        };
 
-       pcie-controller@10003000 {
+       pcie@10003000 {
                status = "okay";
 
                pci@1,0 {
index dd9e3b869de716c43bcb8f559207adfbf2cb6ddb..0a9db9825b85d0ebaae38ef9b5398416bbe97340 100644 (file)
                #interrupt-cells = <2>;
        };
 
-       pcie-controller@10003000 {
+       pcie@10003000 {
                compatible = "nvidia,tegra186-pcie";
                device_type = "pci";
                reg = <0x0 0x10003000 0x0 0x00000800   /* PADS registers */
index 0c907054dbd4afbf697ec8366f546ebe6876c191..7fe7d52096c4d8c7a069e770dc8d5fa7269bcc6b 100644 (file)
                nvidia,sys-clock-req-active-high;
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                status = "okay";
 
                avdd-pex-supply = <&pci_vdd_reg>;
index 31f509ab12c8022be201ad448388533864dae3fe..e19001ee2bdfdfc6e074c9beaa3158ee0ec3cb0f 100644 (file)
@@ -30,7 +30,7 @@
                spi-max-frequency = <25000000>;
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                status = "okay";
 
                avdd-pex-supply = <&pci_vdd_reg>;
index e21ee258b3788cfdc77a0b22eb711706428bc127..275b3432bd88f111672a3f5161def625a6e686bf 100644 (file)
                reset-names = "fuse";
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                compatible = "nvidia,tegra20-pcie";
                device_type = "pci";
                reg = <0x80003000 0x00000800   /* PADS registers */
index da4349bd039f8dbe72ea87d0857f2a1c4e155fe3..c2f497c524affd1245ebe9ac17278fa19e5e73a5 100644 (file)
@@ -21,7 +21,7 @@
                reg = <0x0 0x80000000 0x0 0xc0000000>;
        };
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                status = "okay";
 
                pci@1,0 {
index 229fed04529a1622884f8eeaf1931b76b7413070..3ec54b11c43f45841bc82ed58e366ec0d9cd272a 100644 (file)
@@ -11,7 +11,7 @@
        #address-cells = <2>;
        #size-cells = <2>;
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                compatible = "nvidia,tegra210-pcie";
                device_type = "pci";
                reg = <0x0 0x01003000 0x0 0x00000800   /* PADS registers */
index 1a9ce2720acd4b25537d3163860d2f737084ab04..77502dfdb4783f83f8dc535fdec1b1a87774824a 100644 (file)
@@ -32,7 +32,7 @@
                reg = <0x80000000 0x40000000>;
        };
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                status = "okay";
                avdd-pexa-supply = <&vdd2_reg>;
                vdd-pexa-supply = <&vdd2_reg>;
index f5fbbe849e26eee624a4796678a7fe0e3273ec7b..9bb097b081362997c54437e0efb748837876811f 100644 (file)
@@ -28,7 +28,7 @@
                reg = <0x80000000 0x7ff00000>;
        };
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                status = "okay";
 
                avdd-pexa-supply = <&ldo1_reg>;
index 5b9798c5a874035a190092fd60334787a354ab79..7534861e40d9f47203d3e669ddd5d58f7bc734a9 100644 (file)
@@ -27,7 +27,7 @@
                reg = <0x80000000 0x40000000>;
        };
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                status = "okay";
 
                /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
index 5030065cbdfe38df667fb8cc9e89e4154d5a7798..f198bc0edbe80a702a8b93cf45d7c11d9824767c 100644 (file)
@@ -10,7 +10,7 @@
        compatible = "nvidia,tegra30";
        interrupt-parent = <&lic>;
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                compatible = "nvidia,tegra30-pcie";
                device_type = "pci";
                reg = <0x00003000 0x00000800   /* PADS registers */