sunxi: spl: remove DMA related settings of the NAND controller

Code has been changed to do not use DMA anymore with the NAND
controller, instead PIO is used. Then, DMA-specific initialization may
be dropped.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index ee3bfdac6dc4c25106171f8da17fca79432bdce0..322dd9e23ac379f66b123ddb049d576c52731fc3 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -289,11 +289,6 @@ static void nand_clock_setup(void)
 #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \
     defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I
        setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0));
-#endif
-#ifdef CONFIG_MACH_SUN9I
-       setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
-#else
-       setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA));
 #endif
        setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
 }