treewide: use linux/time.h for time conversion defines

Now that we have time conversion defines from in time.h there is no need
for each driver to define their own version.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> #at91
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> #qcom geni
Reviewed-by: Stefan Bosch <stefan_b@posteo.net> #nanopi2
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

diff --git a/board/friendlyarm/nanopi2/onewire.c b/board/friendlyarm/nanopi2/onewire.c
index 56f0f2dfcebab838eac90b213780de7ac5ed9d14..4f0b1e33c2df98f9c618a6a3d0936f1fd719aba8 100644 (file)
--- a/board/friendlyarm/nanopi2/onewire.c
+++ b/board/friendlyarm/nanopi2/onewire.c
@@ -11,16 +11,13 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/pwm.h>
 #include <i2c.h>
+#include <linux/time.h>
 
 #include <irq_func.h>
 
 #include <asm/arch/nexell.h>
 #include <asm/arch/nx_gpio.h>
 
-#ifndef NSEC_PER_SEC
-#define NSEC_PER_SEC   1000000000L
-#endif
-
 #define SAMPLE_BPS             9600
 #define SAMPLE_IN_US   101             /* (1000000 / BPS) */
 

diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index b52d926f3390cbc69efa6f8d1d87e6a77bcd830b..025c7a7aa26da8c3a4984843a04bfe3d1626a84d 100644 (file)
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -17,6 +17,7 @@
 #include <linux/clk/at91_pmc.h>
 #include <linux/delay.h>
 #include <linux/io.h>
+#include <linux/time.h>
 #include "pmc.h"
 
 #define UBOOT_DM_CLK_AT91_MAIN_RC              "at91-main-rc-clk"
@@ -25,7 +26,6 @@
 #define UBOOT_DM_CLK_AT91_SAM9X5_MAIN          "at91-sam9x5-main-clk"
 
 #define MOR_KEY_MASK           GENMASK(23, 16)
-#define USEC_PER_SEC           1000000UL
 #define SLOW_CLOCK_FREQ                32768
 
 #define clk_main_parent_select(s)      (((s) & \

diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index b6c71789eec0f56c60741aba722b4cf76b7ee08f..eaa1d692898bc7179712692b934b99a52460c324 100644 (file)
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -20,6 +20,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/printk.h>
+#include <linux/time.h>
 
 /* STM32 I2C registers */
 struct stm32_i2c_regs {
@@ -121,8 +122,6 @@ struct stm32_i2c_regs {
 #define STM32_SCLH_MAX                         BIT(8)
 #define STM32_SCLL_MAX                         BIT(8)
 
-#define STM32_NSEC_PER_SEC                     1000000000L
-
 /**
  * struct stm32_i2c_spec - private i2c specification timing
  * @rate: I2C bus speed (Hz)
@@ -591,7 +590,7 @@ static int stm32_i2c_choose_solution(u32 i2cclk,
                                     struct stm32_i2c_timings *s)
 {
        struct stm32_i2c_timings *v;
-       u32 i2cbus = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC,
+       u32 i2cbus = DIV_ROUND_CLOSEST(NSEC_PER_SEC,
                                       setup->speed_freq);
        u32 clk_error_prev = i2cbus;
        u32 clk_min, clk_max;
@@ -607,8 +606,8 @@ static int stm32_i2c_choose_solution(u32 i2cclk,
        dnf_delay = setup->dnf * i2cclk;
 
        tsync = af_delay_min + dnf_delay + (2 * i2cclk);
-       clk_max = STM32_NSEC_PER_SEC / specs->rate_min;
-       clk_min = STM32_NSEC_PER_SEC / specs->rate_max;
+       clk_max = NSEC_PER_SEC / specs->rate_min;
+       clk_min = NSEC_PER_SEC / specs->rate_max;
 
        /*
         * Among Prescaler possibilities discovered above figures out SCL Low
@@ -686,7 +685,7 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv *i2c_priv,
        const struct stm32_i2c_spec *specs;
        struct stm32_i2c_timings *v, *_v;
        struct list_head solutions;
-       u32 i2cclk = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC, setup->clock_src);
+       u32 i2cclk = DIV_ROUND_CLOSEST(NSEC_PER_SEC, setup->clock_src);
        int ret;
 
        specs = get_specs(setup->speed_freq);

diff --git a/drivers/memory/stm32-fmc2-ebi.c b/drivers/memory/stm32-fmc2-ebi.c
index 212bb4f5dc00fe3b3e01eecea82a9816abc4e22b..a722a3836f7b5ea4c42e5f6d61fa26e0ec566540 100644 (file)
--- a/drivers/memory/stm32-fmc2-ebi.c
+++ b/drivers/memory/stm32-fmc2-ebi.c
@@ -14,6 +14,7 @@
 #include <linux/err.h>
 #include <linux/iopoll.h>
 #include <linux/ioport.h>
+#include <linux/time.h>
 
 /* FMC2 Controller Registers */
 #define FMC2_BCR1                      0x0
@@ -90,8 +91,6 @@
 #define FMC2_BTR_DATLAT_MAX            0xf
 #define FMC2_PCSCNTR_CSCOUNT_MAX       0xff
 
-#define FMC2_NSEC_PER_SEC              1000000000L
-
 enum stm32_fmc2_ebi_bank {
        FMC2_EBI1 = 0,
        FMC2_EBI2,
@@ -279,7 +278,7 @@ static u32 stm32_fmc2_ebi_ns_to_clock_cycles(struct stm32_fmc2_ebi *ebi,
                                             int cs, u32 setup)
 {
        unsigned long hclk = clk_get_rate(&ebi->clk);
-       unsigned long hclkp = FMC2_NSEC_PER_SEC / (hclk / 1000);
+       unsigned long hclkp = NSEC_PER_SEC / (hclk / 1000);
 
        return DIV_ROUND_UP(setup * 1000, hclkp);
 }

diff --git a/drivers/mmc/octeontx_hsmmc.h b/drivers/mmc/octeontx_hsmmc.h
index 70844b1cbabeed0376927bb171ff81b8accf7afd..9849121f1749242e0ab99672de091dae3464cfea 100644 (file)
--- a/drivers/mmc/octeontx_hsmmc.h
+++ b/drivers/mmc/octeontx_hsmmc.h
@@ -32,8 +32,6 @@
  */
 #define MMC_TIMEOUT_SHORT              20
 
-#define NSEC_PER_SEC                   1000000000L
-
 #define MAX_NO_OF_TAPS                 64
 
 #define EXT_CSD_POWER_CLASS            187     /* R/W */

diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index fa962ba591c631741b390dc2c5363484558f6cbf..5c0265ccf584f1537496ad00c8108ed01963b927 100644 (file)
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -64,6 +64,7 @@
 #include <linux/mfd/syscon/atmel-smc.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/mtd/mtd.h>
+#include <linux/time.h>
 #include <mach/at91_sfr.h>
 #include <nand.h>
 #include <regmap.h>
@@ -71,8 +72,6 @@
 
 #include "pmecc.h"
 
-#define NSEC_PER_SEC    1000000000L
-
 #define ATMEL_HSMC_NFC_CFG                     0x0
 #define ATMEL_HSMC_NFC_CFG_SPARESIZE(x)                (((x) / 4) << 24)
 #define ATMEL_HSMC_NFC_CFG_SPARESIZE_MASK      GENMASK(30, 24)

diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index 65eab4c8088a43c6b85edd8ed3e38151a0897e3f..fd65772af806691ab35047d94a487469831ba183 100644 (file)
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -31,6 +31,7 @@
 #include <linux/errno.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/sizes.h>
+#include <linux/time.h>
 #include <linux/types.h>
 #include <linux/math64.h>
 
@@ -52,8 +53,6 @@
 #endif
 
 #define        MXS_NAND_BCH_TIMEOUT                    10000
-#define        USEC_PER_SEC                            1000000
-#define        NSEC_PER_SEC                            1000000000L
 
 #define TO_CYCLES(duration, period) DIV_ROUND_UP_ULL(duration, period)
 

diff --git a/drivers/mtd/nand/raw/octeontx_nand.c b/drivers/mtd/nand/raw/octeontx_nand.c
index 65a03d22c1dbfc6f65f69bdd121a1dd8d08c1c60..3b20685fac03d26c77936f1a4c8fab4b334ece8a 100644 (file)
--- a/drivers/mtd/nand/raw/octeontx_nand.c
+++ b/drivers/mtd/nand/raw/octeontx_nand.c
@@ -24,6 +24,7 @@
 #include <linux/mtd/nand_bch.h>
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/rawnand.h>
+#include <linux/time.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/types.h>
@@ -291,7 +292,6 @@ union ndf_cmd {
 #define OCTEONTX_NAND_DRIVER_NAME      "octeontx_nand"
 
 #define NDF_TIMEOUT            1000    /** Timeout in ms */
-#define USEC_PER_SEC           1000000 /** Linux compatibility */
 #ifndef NAND_MAX_CHIPS
 # define NAND_MAX_CHIPS                8       /** Linux compatibility */
 #endif

diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 64be6486b4e0b6ba3667f1e4ef7abf86e123d511..3528824575bfa38f4ba5c424a8e6e6f55cd05c03 100644 (file)
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -22,6 +22,7 @@
 #include <linux/ioport.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/printk.h>
+#include <linux/time.h>
 
 /* Bad block marker length */
 #define FMC2_BBM_LEN                   2
@@ -127,8 +128,6 @@
 #define FMC2_BCHDSR4_EBP7              GENMASK(12, 0)
 #define FMC2_BCHDSR4_EBP8              GENMASK(28, 16)
 
-#define FMC2_NSEC_PER_SEC              1000000000L
-
 #define FMC2_TIMEOUT_5S                        5000000
 
 enum stm32_fmc2_ecc {
@@ -603,7 +602,7 @@ static void stm32_fmc2_nfc_calc_timings(struct nand_chip *chip,
        struct stm32_fmc2_nand *nand = to_fmc2_nand(chip);
        struct stm32_fmc2_timings *tims = &nand->timings;
        unsigned long hclk = clk_get_rate(&nfc->clk);
-       unsigned long hclkp = FMC2_NSEC_PER_SEC / (hclk / 1000);
+       unsigned long hclkp = NSEC_PER_SEC / (hclk / 1000);
        unsigned long timing, tar, tclr, thiz, twait;
        unsigned long tset_mem, tset_att, thold_mem, thold_att;
 

diff --git a/drivers/phy/meson-axg-mipi-dphy.c b/drivers/phy/meson-axg-mipi-dphy.c
index cf2a1cd14c7f548f512feea7ece51c7bd7845bcb..a69b6c9759444fc7f8ec48a58376b3a184fce957 100644 (file)
--- a/drivers/phy/meson-axg-mipi-dphy.c
+++ b/drivers/phy/meson-axg-mipi-dphy.c
@@ -25,6 +25,7 @@
 #include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/bitfield.h>
+#include <linux/time.h>
 
 /* [31] soft reset for the phy.
  *             1: reset. 0: dessert the reset.
@@ -170,8 +171,6 @@
 #define MIPI_DSI_TEST_CTRL0                            0x3c
 #define MIPI_DSI_TEST_CTRL1                            0x40
 
-#define NSEC_PER_MSEC  1000000L
-
 struct phy_meson_axg_mipi_dphy_priv {
        struct regmap *regmap;
 #if CONFIG_IS_ENABLED(CLK)

diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c
index ba5f6486126996513c9f16cf96d03486d3bc4729..bb61816add27da42668b399c7b03011040faabea 100644 (file)
--- a/drivers/phy/phy-core-mipi-dphy.c
+++ b/drivers/phy/phy-core-mipi-dphy.c
@@ -6,11 +6,10 @@
 
 #include <common.h>
 #include <div64.h>
+#include <linux/time.h>
 
 #include <phy-mipi-dphy.h>
 
-#define PSEC_PER_SEC   1000000000000LL
-
 /*
  * Minimum D-PHY timings based on MIPI D-PHY specification. Derived
  * from the valid ranges specified in Section 6.9, Table 14, Page 41

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
index 9ed7af0d6ef1dd8f20823cdb858627efb22b2bf5..5be76e05339e8110ed863f4b0826d7dd8bb7ab7f 100644 (file)
--- a/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c
@@ -15,6 +15,7 @@
 #include <linux/clk-provider.h>
 #include <linux/delay.h>
 #include <linux/math64.h>
+#include <linux/time.h>
 #include <phy-mipi-dphy.h>
 #include <reset.h>
 
@@ -186,8 +187,6 @@
 #define DSI_PHY_STATUS                         0xb0
 #define PHY_LOCK                               BIT(0)
 
-#define PSEC_PER_SEC                           1000000000000LL
-
 #define msleep(a)                              udelay(a * 1000)
 
 enum phy_max_rate {

diff --git a/drivers/pwm/pwm-aspeed.c b/drivers/pwm/pwm-aspeed.c
index ba98641c86603efd6bbcbf91166029afa3036fb3..b03472d2345ca5678a89f9fd1537a0b6f7d9f498 100644 (file)
--- a/drivers/pwm/pwm-aspeed.c
+++ b/drivers/pwm/pwm-aspeed.c
@@ -49,6 +49,7 @@
 #include <dm/device_compat.h>
 #include <linux/math64.h>
 #include <linux/bitfield.h>
+#include <linux/time.h>
 #include <asm/io.h>
 
 /* The channel number of Aspeed pwm controller */
@@ -77,8 +78,6 @@
 /* PWM fixed value */
 #define PWM_ASPEED_FIXED_PERIOD 0xff
 
-#define NSEC_PER_SEC                   1000000000L
-
 struct aspeed_pwm_priv {
        struct clk clk;
        struct regmap *regmap;

diff --git a/drivers/pwm/pwm-at91.c b/drivers/pwm/pwm-at91.c
index 95597aee55785b5f3891e05d472a615bd1c9ee14..3ff1fb6d5c30b3c43cb1ec3a1b3598181d576d5b 100644 (file)
--- a/drivers/pwm/pwm-at91.c
+++ b/drivers/pwm/pwm-at91.c
@@ -14,11 +14,11 @@
 #include <dm.h>
 #include <linux/bitops.h>
 #include <linux/io.h>
+#include <linux/time.h>
 #include <pwm.h>
 
 #define PERIOD_BITS 16
 #define PWM_MAX_PRES 10
-#define NSEC_PER_SEC 1000000000L
 
 #define PWM_ENA 0x04
 #define PWM_CHANNEL_OFFSET 0x20

diff --git a/drivers/pwm/pwm-cadence-ttc.c b/drivers/pwm/pwm-cadence-ttc.c
index dc3b314b0cce0efc70793025ca10d98db83d6db0..d9f6736a7aee737824aadb277d4579ea19c9d4f0 100644 (file)
--- a/drivers/pwm/pwm-cadence-ttc.c
+++ b/drivers/pwm/pwm-cadence-ttc.c
@@ -17,6 +17,7 @@
 #include <linux/bitfield.h>
 #include <linux/math64.h>
 #include <linux/log2.h>
+#include <linux/time.h>
 #include <dm/device_compat.h>
 
 #define CLOCK_CONTROL          0
@@ -37,8 +38,6 @@
 #define COUNTER_INTERVAL_ENABLE                BIT(1)
 #define COUNTER_COUNTING_DISABLE       BIT(0)
 
-#define NSEC_PER_SEC   1000000000L
-
 #define TTC_REG(reg, channel) ((reg) + (channel) * sizeof(u32))
 #define TTC_CLOCK_CONTROL(reg, channel) \
        TTC_REG((reg) + CLOCK_CONTROL, (channel))

diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 2311910a636e91880bbd2e341deba31e49006f8d..60959720dac8ad1d9f5ed3f98fac36036a67831c 100644 (file)
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -26,8 +26,7 @@
 #include <linux/math64.h>
 #include <linux/bitfield.h>
 #include <linux/clk-provider.h>
-
-#define NSEC_PER_SEC 1000000000L
+#include <linux/time.h>
 
 #define REG_PWM_A              0x0
 #define REG_PWM_B              0x4

diff --git a/drivers/pwm/pwm-mtk.c b/drivers/pwm/pwm-mtk.c
index 11e744401971ea1fa1da1b027445109f1a939275..ad845ed9662e5540a99f9d526cac720ba7534696 100644 (file)
--- a/drivers/pwm/pwm-mtk.c
+++ b/drivers/pwm/pwm-mtk.c
@@ -12,6 +12,7 @@
 #include <div64.h>
 #include <linux/bitops.h>
 #include <linux/io.h>
+#include <linux/time.h>
 
 /* PWM registers and bits definitions */
 #define PWMCON                 0x00
@@ -27,8 +28,6 @@
 #define PWM_CLK_DIV_MAX                7
 #define MAX_PWM_NUM            8
 
-#define NSEC_PER_SEC 1000000000L
-
 enum mtk_pwm_reg_ver {
        PWM_REG_V1,
        PWM_REG_V2,

diff --git a/drivers/pwm/pwm-ti-ehrpwm.c b/drivers/pwm/pwm-ti-ehrpwm.c
index f09914519bd15f09c0d5132dca7276e906164467..fefa3c65ec450ae8795d834ce12c35f5da271c50 100644 (file)
--- a/drivers/pwm/pwm-ti-ehrpwm.c
+++ b/drivers/pwm/pwm-ti-ehrpwm.c
@@ -14,8 +14,7 @@
 #include <dm/device_compat.h>
 #include <pwm.h>
 #include <asm/io.h>
-
-#define NSEC_PER_SEC                           1000000000L
+#include <linux/time.h>
 
 /* Time base module registers */
 #define TI_EHRPWM_TBCTL                                0x00

diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
index 78fd9389c036869eb7f7798896840ec9be408218..b8bc61451a01d60c83c42d3cd5542a7fc19496f2 100644 (file)
--- a/drivers/serial/serial_msm_geni.c
+++ b/drivers/serial/serial_msm_geni.c
@@ -13,14 +13,13 @@
 #include <dm.h>
 #include <errno.h>
 #include <linux/delay.h>
+#include <linux/time.h>
 #include <misc.h>
 #include <serial.h>
 
 #define UART_OVERSAMPLING      32
 #define STALE_TIMEOUT  160
 
-#define USEC_PER_SEC   1000000L
-
 /* Registers*/
 #define GENI_FORCE_DEFAULT_REG 0x20
 #define GENI_SER_M_CLK_CFG     0x48

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index cc3a54f2958283147f281902b3e38b29766adce1..b0c656dbb4f539618f8aa7b08185a02fa86f2b0d 100644 (file)
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -18,12 +18,11 @@
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <linux/sizes.h>
+#include <linux/time.h>
 #include <zynqmp_firmware.h>
 #include "cadence_qspi.h"
 #include <dt-bindings/power/xlnx-versal-power.h>
 
-#define NSEC_PER_SEC                   1000000000L
-
 #define CQSPI_STIG_READ                        0
 #define CQSPI_STIG_WRITE               1
 #define CQSPI_READ                     2

diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index f8ec268812cab7efd5d188831b2b72073ea97f4c..89907cbbb02a7f1623b961c20b84ebeb5ac4f6b4 100644 (file)
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -27,9 +27,7 @@
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/printk.h>
-
-/* linux/include/time.h */
-#define NSEC_PER_SEC   1000000000L
+#include <linux/time.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c
index 1e62e252e7aed5c38858d3790d56112f4b0a576e..8ebcb516340cb204df2902ae9e5c7393f0c122e0 100644 (file)
--- a/drivers/ufs/cdns-platform.c
+++ b/drivers/ufs/cdns-platform.c
@@ -13,11 +13,10 @@
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
 #include <linux/err.h>
+#include <linux/time.h>
 
 #include "ufs.h"
 
-#define USEC_PER_SEC   1000000L
-
 #define CDNS_UFS_REG_HCLKDIV   0xFC
 #define CDNS_UFS_REG_PHY_XCFGD1        0x113C
 

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 7ca9d09824e67296488180437d0fd8cb4f5853cc..f0c4aab6b9aa071d067583fa447fb73486b67edb 100644 (file)
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -31,6 +31,7 @@
 #include <linux/usb/gadget.h>
 #include <linux/bitfield.h>
 #include <linux/math64.h>
+#include <linux/time.h>
 
 #include "core.h"
 #include "gadget.h"
@@ -38,8 +39,6 @@
 
 #include "linux-compat.h"
 
-#define NSEC_PER_SEC   1000000000L
-
 static LIST_HEAD(dwc3_list);
 /* -------------------------------------------------------------------------- */
 

diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
index 22fef7e8825f6f7c0ce08393a043c0fe8eeb6d59..a7e0784596a985799bc0b101a26c0da3d2f03b6d 100644 (file)
--- a/drivers/video/dw_mipi_dsi.c
+++ b/drivers/video/dw_mipi_dsi.c
@@ -22,6 +22,7 @@
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/iopoll.h>
+#include <linux/time.h>
 #include <video_bridge.h>
 
 #define HWVER_131                      0x31333100      /* IP version 1.31 */
@@ -214,8 +215,6 @@
 #define PHY_STATUS_TIMEOUT_US          10000
 #define CMD_PKT_STATUS_TIMEOUT_US      20000
 
-#define MSEC_PER_SEC                   1000
-
 struct dw_mipi_dsi {
        struct mipi_dsi_host dsi_host;
        struct mipi_dsi_device *device;

diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
index 1a5ab781e3f1cf3fc9897b00dd04d45ec79f5183..5e75b6ec68cbbb6f0b6a025b069ad50cadbbec85 100644 (file)
--- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
+++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
@@ -30,12 +30,11 @@
 #include <asm/io.h>
 #include <dm/device-internal.h>
 #include <linux/bitops.h>
+#include <linux/time.h>
 
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/hardware.h>
 
-#define USEC_PER_SEC   1000000L
-
 /*
  * DSI wrapper registers & bit definitions
  * Note: registers are named as in the Reference Manual

diff --git a/drivers/video/tegra20/tegra-dsi.c b/drivers/video/tegra20/tegra-dsi.c
index b4cf4fad5eb610af971d5a94b2eab38594bb4d82..a48f9c85d0fdced5b882509feec16545ea4fe3b5 100644 (file)
--- a/drivers/video/tegra20/tegra-dsi.c
+++ b/drivers/video/tegra20/tegra-dsi.c
@@ -14,6 +14,7 @@
 #include <panel.h>
 #include <linux/delay.h>
 #include <linux/err.h>
+#include <linux/time.h>
 #include <power/regulator.h>
 
 #include <asm/gpio.h>
@@ -24,9 +25,6 @@
 
 #include "mipi-phy.h"
 
-#define USEC_PER_SEC   1000000L
-#define NSEC_PER_SEC   1000000000L
-
 struct tegra_dsi_priv {
        struct mipi_dsi_host host;
        struct mipi_dsi_device device;

diff --git a/drivers/watchdog/sunxi_wdt.c b/drivers/watchdog/sunxi_wdt.c
index b40a1d29caaad6904cbe975fc000ccff7a0c0046..8eeac935760f91afcd85a8df7a0be7b81abdd52d 100644 (file)
--- a/drivers/watchdog/sunxi_wdt.c
+++ b/drivers/watchdog/sunxi_wdt.c
@@ -9,8 +9,7 @@
 #include <wdt.h>
 #include <asm/io.h>
 #include <linux/delay.h>
-
-#define MSEC_PER_SEC           1000
+#include <linux/time.h>
 
 #define WDT_MAX_TIMEOUT                16
 #define WDT_TIMEOUT_MASK       0xf

diff --git a/fs/ubifs/ubifs.h b/fs/ubifs/ubifs.h
index 67b13c83b56884904195cc542e408ea657266e68..b4e761c3668f4bf446acb653008d7ccc5bcf2661 100644 (file)
--- a/fs/ubifs/ubifs.h
+++ b/fs/ubifs/ubifs.h
@@ -68,7 +68,6 @@ struct page {
 void iput(struct inode *inode);
 
 /* linux/include/time.h */
-#define NSEC_PER_SEC   1000000000L
 #define get_seconds()  0
 #define CURRENT_TIME_SEC       ((struct timespec) { get_seconds(), 0 })