ARM: atmel: switch to main crystal osc for SPL boot

If without switch to main crystal oscillator, the sama5d3 SoC will
use internal on chip RC oscillator.
In order to get better accuracy, switch to main crystal oscillator.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

diff --git a/arch/arm/cpu/at91-common/spl.c b/arch/arm/cpu/at91-common/spl.c
index 7f4debb912597d5a251cfa095b0309497b2528b0..cbb5a529da2b520fb841e8cc77f2357606abeb3b 100644 (file)
--- a/arch/arm/cpu/at91-common/spl.c
+++ b/arch/arm/cpu/at91-common/spl.c
@@ -20,6 +20,43 @@ static void at91_disable_wdt(void)
        writel(AT91_WDT_MR_WDDIS, &wdt->mr);
 }
 
+static void switch_to_main_crystal_osc(void)
+{
+       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+       u32 tmp;
+
+       tmp = readl(&pmc->mor);
+       tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
+       tmp &= ~AT91_PMC_MOR_KEY(0xff);
+       tmp |= AT91_PMC_MOR_MOSCEN;
+       tmp |= AT91_PMC_MOR_OSCOUNT(8);
+       tmp |= AT91_PMC_MOR_KEY(0x37);
+       writel(tmp, &pmc->mor);
+       while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
+               ;
+
+       tmp = readl(&pmc->mor);
+       tmp &= ~AT91_PMC_MOR_OSCBYPASS;
+       tmp &= ~AT91_PMC_MOR_KEY(0xff);
+       tmp |= AT91_PMC_MOR_KEY(0x37);
+       writel(tmp, &pmc->mor);
+
+       tmp = readl(&pmc->mor);
+       tmp |= AT91_PMC_MOR_MOSCSEL;
+       tmp &= ~AT91_PMC_MOR_KEY(0xff);
+       tmp |= AT91_PMC_MOR_KEY(0x37);
+       writel(tmp, &pmc->mor);
+
+       while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
+               ;
+
+       tmp = readl(&pmc->mor);
+       tmp &= ~AT91_PMC_MOR_MOSCRCEN;
+       tmp &= ~AT91_PMC_MOR_KEY(0xff);
+       tmp |= AT91_PMC_MOR_KEY(0x37);
+       writel(tmp, &pmc->mor);
+}
+
 void at91_plla_init(u32 pllar)
 {
        struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
@@ -76,6 +113,8 @@ u32 spl_boot_mode(void)
 
 void s_init(void)
 {
+       switch_to_main_crystal_osc();
+
        /* disable watchdog */
        at91_disable_wdt();
 

diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h
index 4535608434c0b3de54e16596bc4c9e85b60ea7c9..04f6239fd0b846da6acd5e5227c861b517a8a72e 100644 (file)
--- a/arch/arm/include/asm/arch-at91/at91_pmc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
@@ -70,7 +70,10 @@ typedef struct at91_pmc {
 
 #define AT91_PMC_MOR_MOSCEN            0x01
 #define AT91_PMC_MOR_OSCBYPASS         0x02
+#define AT91_PMC_MOR_MOSCRCEN          0x08
 #define AT91_PMC_MOR_OSCOUNT(x)                ((x & 0xff) << 8)
+#define AT91_PMC_MOR_KEY(x)            ((x & 0xff) << 16)
+#define AT91_PMC_MOR_MOSCSEL           (1 << 24)
 
 #define AT91_PMC_PLLXR_DIV(x)          (x & 0xFF)
 #define AT91_PMC_PLLXR_PLLCOUNT(x)     ((x & 0x3F) << 8)
@@ -142,6 +145,7 @@ typedef struct at91_pmc {
 #define AT91_PMC_IXR_PCKRDY1           0x00000200
 #define AT91_PMC_IXR_PCKRDY2           0x00000400
 #define AT91_PMC_IXR_PCKRDY3           0x00000800
+#define AT91_PMC_IXR_MOSCSELS          0x00010000
 
 #define                AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define                AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */