Convert CONFIG_SYS_L2_PL310 to Kconfig

This converts CONFIG_SYS_L2_PL310 to Kconfig.

For omap2 and mvebu the 'select SYS_L2_PL310' locations were
determined using ./tools/moveconfig -i CONFIG_SYS_L2_PL310.

For mx6 I manually chose ARCH_MX6 as 'select' location. The
correctness has been verified using

	$ ./tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF
	0 matches

That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this
was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert
the 'select' statement under ARCH_MX6.

Signed-off-by: Philip Oberfichtner <pro@denx.de>

diff --git a/README b/README
index 98185af6246323ff5c61ef7f0405ba4acea57f3d..186f1f9a5ffb8161c51cfdf4e72daaf5d0e8c97b 100644 (file)
--- a/README
+++ b/README
@@ -415,8 +415,6 @@ The following options need to be configured:
                the defaults discussed just above.
 
 - Cache Configuration for ARM:
-               CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
-                                     controller
                CONFIG_SYS_PL310_BASE - Physical base address of PL310
                                        controller register space
 

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0b72e4f6503e055b7734c37f4563e24870f7c27b..456a7faee4809e872fd63666fa153084bbc4a4b2 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -488,6 +488,10 @@ config TPL_SYS_THUMB_BUILD
           density. For ARM architectures that support Thumb2 this flag will
           result in Thumb2 code generated by GCC.
 
+config SYS_L2_PL310
+       bool "ARM PL310 L2 cache controller"
+       help
+         Enable support for ARM PL310 L2 cache controller in U-Boot
 
 config SYS_L2CACHE_OFF
        bool "L2cache off"
@@ -989,6 +993,7 @@ config ARCH_MX6
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_LE
+       select SYS_L2_PL310 if !SYS_L2CACHE_OFF
        imply MXC_GPIO
        imply SYS_THUMB_BUILD
        imply SPL_SEPARATE_BSS

diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index a81b8e2b0df2f1b3480c50790335506cb4e29a5e..2ebe341ed1b742c292f677f5dbeccd18da3981c9 100644 (file)
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -14,6 +14,7 @@ config ARMADA_32BIT
        select SPL_SKIP_LOWLEVEL_INIT if SPL
        select SPL_SIMPLE_BUS if SPL
        select SUPPORT_SPL
+       select SYS_L2_PL310 if !SYS_L2CACHE_OFF
        select TRANSLATION_OFFSET
        select SPL_SYS_NO_VECTOR_TABLE if SPL
        select ARCH_VERY_EARLY_INIT

diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index 4add0d9e1030da3a996a747a44f1ff1f1a1e3089..0bba0a4cf9b4542122a4ef077367113f52305d3d 100644 (file)
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -25,8 +25,6 @@
 #define MV88F78X60 /* for the DDR training bin_hdr code */
 #endif
 
-#define CONFIG_SYS_L2_PL310
-
 #define MV_UART_CONSOLE_BASE           MVEBU_UART0_BASE
 
 /* Needed for SPI NOR booting in SPL */

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 914d43b04965f1a23437f0d3b45cc574b2ea6353..78317e474dbfe309bfb2aa43f13415b54a576792 100644 (file)
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -96,6 +96,7 @@ config TI816X
 config AM43XX
        bool "AM43XX SoC"
        select SPECIFY_CONSOLE_INDEX
+       select SYS_L2_PL310 if !SYS_L2CACHE_OFF
        imply NAND_OMAP_ELM
        imply NAND_OMAP_GPMC
        imply SPL_DM

diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index 3a28adf2ae8153e33554d2b2d5cf9791f2fa51e8..814953fae64507cb349ba3b44167c4f7d300f4e3 100644 (file)
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_DEFAULT_DEVICE_TREE="omap4-panda"

diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig
index 6d5de532f36e63f678e44148dfef30ba7d67fee0..a2645b9819751e3e803529457c938d4c5e113d6e 100644 (file)
--- a/configs/omap4_sdp4430_defconfig
+++ b/configs/omap4_sdp4430_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_OMAP2PLUS=y

diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig
index ba017e327a149b356bd1234d53f8aa04e2ed2e64..597a72eed9d00825097e996df1c8129793154dd6 100644 (file)
--- a/configs/poleg_evb_defconfig
+++ b/configs/poleg_evb_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_CPU_INIT=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_NPCM=y
 CONFIG_SYS_TEXT_BASE=0x8200
 CONFIG_SYS_MALLOC_LEN=0x240000

diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 3eac3dfa5df152cf75c40b66128a30ed301ef131..6fe8d55002916207a899141ffbda5c91c62fce50 100644 (file)
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index dbadb3d49af674f3bf51d63cbfe855e8562a6e61..2632c0af4ea61726afea20820848e9a550ca39ca 100644 (file)
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 2a5a2773193c1ac258699a35b008720aacc8aeae..478efc59ea917eb80dac6e5e1882ab1fe9ee9ffd 100644 (file)
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x4400

diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 4fd14d2e2c152c9e45bfe7eabf319f2b186ee85d..451de03e1da69d551d5c16e6eb23a587188a91e8 100644 (file)
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig
index 5c17ccb651ec9ba9e618a1a95dffcfe36e60f1e6..7786843427e6afb856ce70e8ff7f7bb1000554ed 100644 (file)
--- a/configs/socfpga_dbm_soc1_defconfig
+++ b/configs/socfpga_dbm_soc1_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 1ef0dd93981b122a969dfebf9b5e7dbec47dac16..cfc8b50e2b20cd3db1e4e93973beeb075dd30391 100644 (file)
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 296128c9fb3dc1fb9185ea0def00cb1024a7d9c6..53c4ff5ffd28c3005a74b6b8c64e3c15067bc027 100644 (file)
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig
index 8e6fe0697d5eda73f0402dc3aa4f5bb4bb687c89..15d45995261babbcdff1f2e69b9d58156e03a421 100644 (file)
--- a/configs/socfpga_de10_standard_defconfig
+++ b/configs/socfpga_de10_standard_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index 15089fe6d92d0d5193bcc5a91ba4232afab71843..2a15936806851e81c7ecce8235e2b45d0889408d 100644 (file)
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 832b26f6dec2f1fffa4845f6681bc83554252631..3a21bc77a2e335d6372b021ada1470dca560743a 100644 (file)
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 75190c0eb58dc2c94c294ba64d268568e4c8f537..35ea73a5987583c30c76991a0f6650e9ad557481 100644 (file)
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 400c89b84f3124cdccedea8dd9b287a0b8bd8396..a6106f2a43df20134c050105834a84b3a9b6aca9 100644 (file)
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_SYS_MALLOC_F_LEN=0x800

diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 1e9dc14af068a4c00af94eb01d7a9849f9b1a40e..0539d2937eff5b190a65b862ccfc21eea50089fe 100644 (file)
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index dab11f8920bd518a6cbeb98d5ff8faf8f3229f40..a81f74d329e5e3cc76b7639e7fb9ed533e8a2a77 100644 (file)
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x2000

diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index 90ffa9a9c59f45e9b27f9fb80c92fa1b609b16f3..59d809ca0ed6ed7dad32feb67ad14cac49132ef0 100644 (file)
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x4000

diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 1b88ccd209fc661c227512832152c3db91b0105d..3a99667811ae37078fb1522ad9f9d42eb33a3a64 100644 (file)
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_ENV_SIZE=0x4000

diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig
index 7fc0a39872c9c63c2c3e157693691fc38eb64fa5..f1d3ef5b12355ab3288260c7bef2dbcb827f795f 100644 (file)
--- a/configs/stemmy_defconfig
+++ b/configs/stemmy_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_L2_PL310=y
 CONFIG_ARCH_U8500=y
 CONFIG_SUPPORT_PASSING_ATAGS=y
 # CONFIG_SETUP_MEMORY_TAGS is not set

diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 87d3a27099bd326241cba8b814cff4c1c85ffcb9..fc82a8c003e50fb5809943c6ab113e23224bbbff 100644 (file)
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -29,7 +29,6 @@
 /* SPL defines. */
 
 /* Enabling L2 Cache */
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE  0x48242000
 
 /*

diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h
index adaba410ce9714a429fd193026101b33b55066f7..0c7fe5f3abbab7f70a96a00ade02746bbe436279 100644 (file)
--- a/include/configs/brppt2.h
+++ b/include/configs/brppt2.h
@@ -13,7 +13,6 @@
 
 /* -- i.mx6 specifica -- */
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE          L2_PL310_BASE
 #endif /* !CONFIG_SYS_L2CACHE_OFF */
 

diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index 07c5cb8ded1b506a5c35bf1c2ef9f82c647c62b1..50cb2a47187f1cc287c892da67f82d680c2ced22 100644 (file)
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -36,7 +36,6 @@
 #define CONFIG_POWER_TPS65218
 
 /* Enabling L2 Cache */
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE          0x48242000
 
 /*

diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index e416f81e43a164613c857bff02e2f3b569537939..43145567544467c89919d66f4d9f6c5cd08bffbd 100644 (file)
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -12,7 +12,6 @@
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
 #else
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE  L2_PL310_BASE
 #endif
 

diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 7448cc9520364ab95ce1ee36b2b03e2635187d31..babd3ca9631c6136c160635fa5adc93acb98bb8c 100644 (file)
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -14,7 +14,6 @@
 #include <configs/exynos4-common.h>
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE  0x10502000
 #endif
 

diff --git a/include/configs/poleg.h b/include/configs/poleg.h
index f1c259f4760b690cf84a8c1df08f35ca78ec6b57..05253d59efdc5cb78a611f826c7db728317cbc3f 100644 (file)
--- a/include/configs/poleg.h
+++ b/include/configs/poleg.h
@@ -7,7 +7,6 @@
 #define __CONFIG_POLEG_H
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310            1
 #define CONFIG_SYS_PL310_BASE  0xF03FC000       /* L2 - Cache Regs Base (4k Space)*/
 #endif
 

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 4a7da76e51e611b840adf4114e959d0aa343aaa4..c3f30afe2b555396b0678ee8a74c130eba171b3f 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -48,7 +48,6 @@
 /*
  * Cache
  */
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE          SOCFPGA_MPUL2_ADDRESS
 
 /*

diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h
index 71b25c23b13c77c4ca90b0750bfc510579ab389d..3c70856fc70aa49e93c47ce3bb3c76cc24659a56 100644 (file)
--- a/include/configs/stemmy.h
+++ b/include/configs/stemmy.h
@@ -15,7 +15,6 @@
  */
 
 /* FIXME: This should be loaded from device tree... */
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE          0xa0412000
 
 /* Linux does not boot if FDT / initrd is loaded to end of RAM */

diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 3d78972bfebb3c9e3dee7a9f69c7014015c817e2..0568946fc824394e1f4a0654e49a2cc9b0b47081 100644 (file)
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -12,7 +12,6 @@
 #define __CONFIG_TI_OMAP4_COMMON_H
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310            1
 #define CONFIG_SYS_PL310_BASE  0x48242000
 #endif
 

diff --git a/include/configs/trats.h b/include/configs/trats.h
index 53f5a6996bd77a6c6a365e913806c58d43b78edc..530b413d5b686f5be2199e05c6c0649d796b5243 100644 (file)
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -12,7 +12,6 @@
 #include <configs/exynos4-common.h>
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE  0x10502000
 #endif
 

diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index b7449dab8bdb4d5364ccd50841378b38653d3a07..06c1fcd23e09bbe183b9745477c81437ec73336e 100644 (file)
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -13,7 +13,6 @@
 #include <configs/exynos4-common.h>
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE  0x10502000
 #endif
 

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 75ae68766fa1ba96c931c4012f7f6131b899f978..dc0cba0010361ad2f13ee43a654666b81a7dbbb9 100644 (file)
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -11,7 +11,6 @@
 
 /* Cache options */
 #ifndef CONFIG_SYS_L2CACHE_OFF
-# define CONFIG_SYS_L2_PL310
 # define CONFIG_SYS_PL310_BASE         0xf8f02000
 #endif
 

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index c5e8942a76a1f6fe95f6e9d41c14c8cf0a062128..2a589eeb072288300067ef82ee3b54cde9e843dd 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -845,7 +845,6 @@ CONFIG_SYS_JFFS2_FIRST_SECTOR
 CONFIG_SYS_JFFS2_NUM_BANKS
 CONFIG_SYS_KMBEC_FPGA_BASE
 CONFIG_SYS_KMBEC_FPGA_SIZE
-CONFIG_SYS_L2_PL310
 CONFIG_SYS_L2_SIZE
 CONFIG_SYS_L3_SIZE
 CONFIG_SYS_LATCH_ADDR