microblaze: cache: introduce flush_dcache_range()

Align microblaze with the other architectures and provide an
implementation for flush_dcache_range(). Also, remove the microblaze
exception in drivers/core/device.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index cd8507901d4ed419adcf1603c139599ab2db0349..829e6c7ae60577e48c457f96d5483727170a9e53 100644 (file)
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -49,6 +49,17 @@ static void __flush_dcache(ulong addr, ulong size)
        }
 }
 
+void flush_dcache_range(unsigned long start, unsigned long end)
+{
+       if (start >= end) {
+               debug("Invalid dcache range - start: 0x%08lx end: 0x%08lx\n",
+                     start, end);
+               return;
+       }
+
+       __flush_dcache(start, end - start);
+}
+
 void flush_dcache_all(void)
 {
        __flush_dcache(0, gd_cpuinfo()->dcache_size);

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 3ab2583df3885cf99a9c2255037339a774491852..03155e98673e15c9a747919e01973deb806af0dd 100644 (file)
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -328,13 +328,8 @@ static void *alloc_priv(int size, uint flags)
                         * within this range at the start. The driver can then
                         * use normal flush-after-write, invalidate-before-read
                         * procedures.
-                        *
-                        * TODO(sjg@chromium.org): Drop this microblaze
-                        * exception.
                         */
-#ifndef CONFIG_MICROBLAZE
                        flush_dcache_range((ulong)priv, (ulong)priv + size);
-#endif
                }
        } else {
                priv = calloc(1, size);