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(parent: 19dbc09) | patch
drivers/crypto: aspeed: Add Caliptra SHA ACC support
authorChia-Wei Wang <chiawei_wang@aspeedtech.com>
Fri, 30 Aug 2024 07:23:34 +0000 (15:23 +0800)
committerTom Rini <trini@konsulko.com>
Mon, 16 Sep 2024 22:37:17 +0000 (16:37 -0600)
commitfca70d61817b9ad2fb4b4821b029e55f1945997b
tree607b4b95a011998838c631441ed0df934e52b4b8tree | snapshot
parent19dbc09405d3503ce3efef3c2e4b4f0f1a03372dcommit | diff
drivers/crypto: aspeed: Add Caliptra SHA ACC support

Aspeed AST27xx SoCs integrate the CPTRA 1.0 secure IP, which
export a SHA accelerator interface for SoC to use.

Note that CPTRA 1.0 supports only SHA384 and SHA512 and this
patch is verified by the 'hash test sha384/sha512' commands.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
drivers/crypto/aspeed/Kconfig diff | blob | history
drivers/crypto/aspeed/Makefile diff | blob | history
drivers/crypto/aspeed/cptra_sha.c [new file with mode: 0644] blob
My U-Boot fork