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(parent: 1ba80d1) | patch
ARM: tegra30: clock: implement PLLD2 support
authorSvyatoslav Ryhel <clamor95@gmail.com>
Mon, 3 Jul 2023 15:11:58 +0000 (18:11 +0300)
committerSvyatoslav Ryhel <clamor95@gmail.com>
Tue, 19 Dec 2023 19:24:11 +0000 (21:24 +0200)
commite63ab85dba80f15f6740821a4669569564537f94
tree079f3d6242b77b5fd0de7f429e559a0a5c55de61tree | snapshot
parent1ba80d1b2ce474e0e924bc9c0c1b44d3554204b1commit | diff
ARM: tegra30: clock: implement PLLD2 support

PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
arch/arm/include/asm/arch-tegra/clk_rst.h diff | blob | history
arch/arm/include/asm/arch-tegra30/clock-tables.h diff | blob | history
arch/arm/mach-tegra/clock.c diff | blob | history
arch/arm/mach-tegra/tegra30/clock.c diff | blob | history
My U-Boot fork