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(parent: 3b95902) | patch
aspeed: Refactor SCU to use consistent mask & shift
authormaxims@google.com <maxims@google.com>
Mon, 17 Apr 2017 19:00:33 +0000 (12:00 -0700)
committerTom Rini <trini@konsulko.com>
Mon, 8 May 2017 15:57:35 +0000 (11:57 -0400)
commitdefb184904c05df8ca49bd0265969ce72cb92401
tree2ef2073c46d5a2fa68a512486d9f559d78bda6cdtree | snapshot
parent3b95902d47f89f95242ac143cd2a9ed1fd196157commit | diff
aspeed: Refactor SCU to use consistent mask & shift

Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/include/asm/arch-aspeed/scu_ast2500.h diff | blob | history
arch/arm/mach-aspeed/ast2500/sdram_ast2500.c diff | blob | history
drivers/clk/aspeed/clk_ast2500.c diff | blob | history
My U-Boot fork