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(parent: cb3ed86) | patch
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO
authorMarek Vasut <marex@denx.de>
Tue, 14 Sep 2021 03:25:36 +0000 (05:25 +0200)
committerMarek Vasut <marex@denx.de>
Wed, 22 Sep 2021 19:30:39 +0000 (21:30 +0200)
commitb207cc92a2e74774f05df2b281a7f530e76d1f61
tree6faa43d2181870c18b5a47174f31304f7b770f0atree | snapshot
parentcb3ed86cf1f4ba97250cf3649a2d43012dd661fdcommit | diff
arm: socfpga: vining: Let DWMAC configure PHY reset GPIO

The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
board/softing/vining_fpga/socfpga.c diff | blob | history
My U-Boot fork