From 8ddb8cfb1a4edee9c413381b5350e62b0ed701a0 Mon Sep 17 00:00:00 2001
From: Gabriel Huau <contact@huau-gabriel.fr>
Date: Sat, 25 Apr 2015 08:13:11 -0700
Subject: [PATCH] x86: minnowmax: use the correct NOR in the configuration
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
arch/x86/dts/minnowmax.dts | 2 +-
include/configs/minnowmax.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 4be227a3b0..0233f61417 100644
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -74,7 +74,7 @@
compatible = "intel,ich-spi";
spi-flash@0 {
reg = <0>;
- compatible = "sst,25vf016b", "spi-flash";
+ compatible = "stmicro,n25q064a", "spi-flash";
memory-map = <0xff800000 0x00800000>;
};
};
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 6dbae8faf4..2a1915d872 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -42,7 +42,7 @@
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}
-#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
--
2.39.5