From 7f4e294b5743bdb0995756c894e92b81a11599fb Mon Sep 17 00:00:00 2001 From: Tobias Schramm Date: Mon, 15 Feb 2021 00:19:58 +0100 Subject: [PATCH] sunxi: support boot console on uart1 for sun8i The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins as boot console. Signed-off-by: Tobias Schramm Reviewed-by: Andre Przywara Signed-off-by: Andre Przywara --- arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/mach-sunxi/board.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index de77bf638e..2969a530ae 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -190,6 +190,7 @@ enum sunxi_gpio_number { #define SUN5I_GPG_SDC1 2 #define SUN6I_GPG_SDC1 2 #define SUN8I_GPG_SDC1 2 +#define SUN8I_GPG_UART1 2 #define SUN6I_GPG_TWI3 2 #define SUN5I_GPG_UART1 4 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index ae6bc656d9..d25081c92f 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -144,6 +144,11 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART); sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART); sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I) && \ + !defined(CONFIG_MACH_SUN8I_R40) + sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_GPG_UART1); + sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN8I_GPG_UART1); + sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP); #else #error Unsupported console port number. Please fix pin mux settings in board.c #endif -- 2.39.5