From 72022a5b2e142d4696964ffd354a01b67eb4fa72 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Fri, 20 Aug 2021 07:43:16 -0600 Subject: [PATCH] spi: zynqmp_gqspi: Switch genfifo start to manual mode Current implementation uses auto mode for starting generic FIFO. The recommendation from IP designers is to use manual mode, hence change to manual start mode. In fill genfifo first write to genfio and then trigger manual start. Also enable and check for genfifo empty interrupt status in place of genfifo not full interrupt. Signed-off-by: Ashok Reddy Soma Tested-by: Michal Simek Signed-off-by: Michal Simek --- drivers/spi/zynqmp_gqspi.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index fc81b07343..93ba7a0ff5 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -202,9 +202,8 @@ static void zynqmp_qspi_init_hw(struct zynqmp_qspi_priv *priv) config_reg = readl(®s->confr); config_reg &= ~(GQSPI_GFIFO_STRT_MODE_MASK | GQSPI_CONFIG_MODE_EN_MASK); - config_reg |= GQSPI_CONFIG_DMA_MODE | - GQSPI_GFIFO_WP_HOLD | - GQSPI_DFLT_BAUD_RATE_DIV; + config_reg |= GQSPI_CONFIG_DMA_MODE | GQSPI_GFIFO_WP_HOLD | + GQSPI_DFLT_BAUD_RATE_DIV | GQSPI_GFIFO_STRT_MODE_MASK; writel(config_reg, ®s->confr); writel(GQSPI_ENABLE_ENABLE_MASK, ®s->enbr); @@ -242,6 +241,8 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, u32 config_reg, ier; int ret = 0; + writel(gqspi_fifo_reg, ®s->genfifo); + config_reg = readl(®s->confr); /* Manual start if needed */ config_reg |= GQSPI_STRT_GEN_FIFO; @@ -249,16 +250,15 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, /* Enable interrupts */ ier = readl(®s->ier); - ier |= GQSPI_IXR_GFNFULL_MASK; + ier |= GQSPI_IXR_GFEMTY_MASK; writel(ier, ®s->ier); - /* Wait until the fifo is not full to write the new command */ - ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFNFULL_MASK, 1, + /* Wait until the gen fifo is empty to write the new command */ + ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFEMTY_MASK, 1, GQSPI_TIMEOUT, 1); if (ret) printf("%s Timeout\n", __func__); - writel(gqspi_fifo_reg, ®s->genfifo); } static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) -- 2.39.5