From 642a86041228974c154dc7e250f3d1e0b8adf33f Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Mon, 30 Jul 2018 14:29:27 +0200
Subject: [PATCH] gpio: xilinx: Simplify logic in xilinx_gpio_set_value
There is no reason to do read/write for if/else separately.
Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
---
drivers/gpio/xilinx_gpio.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 1e5f3da8d7..cccfa75617 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -61,18 +61,17 @@ static int xilinx_gpio_set_value(struct udevice *dev, unsigned offset,
if (ret)
return ret;
+ val = readl(&platdata->regs->gpiodata + bank * 2);
+
debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x\n",
__func__, (ulong)platdata->regs, value, offset, bank, pin);
- if (value) {
- val = readl(&platdata->regs->gpiodata + bank * 2);
+ if (value)
val = val | (1 << pin);
- writel(val, &platdata->regs->gpiodata + bank * 2);
- } else {
- val = readl(&platdata->regs->gpiodata + bank * 2);
+ else
val = val & ~(1 << pin);
- writel(val, &platdata->regs->gpiodata + bank * 2);
- }
+
+ writel(val, &platdata->regs->gpiodata + bank * 2);
return val;
};
--
2.39.5