From 5193405a163aa9bab068680167fdeb0e1008e7b5 Mon Sep 17 00:00:00 2001
From: Priyanka Jain <priyanka.jain@nxp.com>
Date: Tue, 25 Apr 2017 10:12:31 +0530
Subject: [PATCH] board: freescale: ls2080ardb: Enable SD interface for RevF
board
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---
.../asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++
board/freescale/ls2080ardb/ls2080ardb.c | 18 ++++++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 80c421f710..59410aa7e7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -1,6 +1,7 @@
/*
* LayerScape Internal Memory Map
*
+ * Copyright (C) 2017 NXP Semiconductors
* Copyright 2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
@@ -45,6 +46,9 @@
#define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01010000)
#define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000)
#define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000)
+#define GPIO4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01330000)
+#define GPIO4_GPDIR_ADDR (GPIO4_BASE_ADDR + 0x0)
+#define GPIO4_GPDAT_ADDR (GPIO4_BASE_ADDR + 0x8)
#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000)
#define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index ea05ec6f65..c2aa1019c4 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -1,4 +1,5 @@
/*
+ * Copyright (C) 2017 NXP Semiconductors
* Copyright 2015 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
@@ -205,6 +206,23 @@ int board_early_init_f(void)
int misc_init_r(void)
{
+#ifdef CONFIG_FSL_QIXIS
+ u8 sw;
+
+ sw = QIXIS_READ(arch);
+ /*
+ * LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
+ * which needs to be programmed to enable high speed SD interface
+ * by setting GPIO4_10 output to zero
+ */
+ if ((sw & 0xf) == 0x5) {
+ out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
+ in_le32(GPIO4_GPDIR_ADDR)));
+ out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
+ in_le32(GPIO4_GPDAT_ADDR)));
+ }
+#endif
+
if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
--
2.39.5