From 1fd2d792a248916de23dc7644b54694c709465f1 Mon Sep 17 00:00:00 2001
From: Cliff Cai <cliff.cai@analog.com>
Date: Mon, 7 Dec 2009 06:12:11 +0000
Subject: [PATCH] Blackfin: bfin_sdh: set all timer bits before transfer

The timer register is 32bits, not 16bit, so 0xFFFF won't fill it.
Write out -1 to make sure to fill the whole thing.

Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
---
 drivers/mmc/bfin_sdh.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 5670939e1e..f9da6a370b 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -123,7 +123,7 @@ static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data)
 	bfin_write_SDH_DATA_CTL(data_ctl);
 	dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN;
 
-	bfin_write_SDH_DATA_TIMER(0xFFFF);
+	bfin_write_SDH_DATA_TIMER(-1);
 
 	blackfin_dcache_flush_invalidate_range(data->dest,
 			data->dest + data->blocksize);
-- 
2.39.5