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5 months agoddr: marvell: a38x: Import old DDR training code from 2017 version of U-Boot
Marek Behún [Tue, 18 Jun 2024 15:34:35 +0000 (17:34 +0200)]
ddr: marvell: a38x: Import old DDR training code from 2017 version of U-Boot

Import DDR training code from commit 1b69ce2fc0ec ("arm: mvebu:
ddr3_debug: remove self assignments") into
drivers/ddr/marvell/a38x/old/. The code is not used yet.

Explanation:

Since 2019, on some Turris Omnia boards we have been having problems
with newer versions of Marvell's DDR3 training code for Armada 38x,
which is ported from mv-ddr-marvell [1] to U-Boot into the
drivers/ddr/marvell/a38x/ directory:
- sometimes the DDR3 training fails on some older boards, sometime it
  fails on some newer boards
- other times it succeeds, but some boards experience crashes of the
  operating system after running for some time.

Using the stock version of Turris Omnia's U-Boot from solved these
issues, but this solution was not satisfactory, since we wanted
features from new U-Boot.

Back in 2020-2022 we have spent several months trying to debug the
issues, working with Marvell, on our own, and also with U-Boot
community, but these issues persist still.

One solution we used back in 2019 was a "hybrid U-Boot": the SPL part
(containing the DDR3 training code) was taken from the stock version,
while the proper part was current U-Boot at the time. This solution also
has its drawbacks, of which the main one is the need to glue binaries
from two separate builds.

Since then there have been some more changes to the DDR3 training code
in upstream mv-ddr-marvell that have been ported to U-Boot. We have
provided our users experimental builds of U-Boot in the TurrisOS so that
they could try upgrading the firmware and let us know if those problems
still exist. And they do.

We do not have the time nor manpower to debug this problem and fix it
properly. Marvell was also no able to provide a solution to this,
probably because they do not have the manpower as well.

I have therefore come up with this "not that pretty" solution: take the
DDR3 training code from an older version of U-Boot that is known to
work, put it into current U-Boot under old/ subdirectory within
drivers/ddr/marvell/a38x/, build into the SPL binary both the old and
new versions and make it possible to select the old version via an env
variable.

[1] https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: mvebu: turris_omnia: Read DDR speed from EEPROM
Marek Behún [Tue, 18 Jun 2024 15:34:34 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Read DDR speed from EEPROM

Some Turris Omnia boards experience memory issues, and by
experimentation we found that some of these issues can be solved by
slowing DDR speed.

Add a new field in the extended EEPROM information structure, ddr_speed.
Support several values in this field (for now 1066F, 1333H, and the
default, 1600K) and use it to overwrite the DDR topology parameters
used by the DDR training algorithm.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: mvebu: turris_omnia: Extend EEPROM info structure
Marek Behún [Tue, 18 Jun 2024 15:34:33 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Extend EEPROM info structure

Extend the Omnia EEPROM information structure in preparation for more
variables to be stored there.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: mvebu: turris_omnia: Enable the 'eeprom' command
Marek Behún [Tue, 18 Jun 2024 15:34:32 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Enable the 'eeprom' command

Enable the 'eeprom' command with support for EEPROM layout for Turris
Omnia. Enable the i2c-eeprom driver so that the EEPROM is accessed via
driver model.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: mvebu: turris_omnia: Implement EEPROM layout for the 'eeprom' command
Marek Behún [Tue, 18 Jun 2024 15:34:31 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Implement EEPROM layout for the 'eeprom' command

Implement Turris Omnia EEPROM layout for the 'eeprom' command.

When the 'eeprom' command (with layout support) is enabled, we can now
use the 'eeprom print' and 'eeprom update' commands, for example:

  => eeprom print
  Magic constant                34a04103
  RAM size in GB                2
  Wi-Fi Region
  CRC32 checksum                cecbc2a1

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: mvebu: turris_omnia: Fix ethernet PHY reset gpio FDT fixup
Marek Behún [Tue, 18 Jun 2024 15:34:30 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Fix ethernet PHY reset gpio FDT fixup

For board revisions where the WAN ethernet PHY reset GPIO is controllable
via MCU we currently insert a phy-reset-gpios property into the ethernet
controller node. The mvneta driver parses this property and uses the
GPIO to reset the PHY.

But this phy-reset-gpios property is not a valid DT binding in upstream
kernel. Instead, a reset-gpios property should be inserted into the
ethernet PHY node. This correct DT binding is supported by the DM ETH PHY
U-Boot driver.

Insert the reset-gpios property into the WAN PHY node instead the
phy-reset-gpios property in WAN ETH node so that Linux will correctly use
the reset GPIO.

Enable the CONFIG_DM_ETH_PHY config option so that U-Boot will also use
the correct DT property.

Note: currently there are 4 ethernet controller drivers parsing the
wrong DT property: dwc_eth_qos, fex_mxc, mvneta and mvpp2. We should
convert all relevant device-trees to use reset-gpios so that we can get
rid of these drivers parsing this property.

Fixes: 1da53ae26afc ("arm: mvebu: turris_omnia: Add support for design with SW reset signals")
Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: mvebu: turris_omnia: Enable immutable debug settings in DDR3 training by default
Marek Behún [Tue, 18 Jun 2024 15:34:29 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Enable immutable debug settings in DDR3 training by default

Save 10 KiB in Turris Omnia's SPL binary by enabling immutable debug
settings for DDR3 training code.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoddr: marvell: a38x: debug: Allow compiling with immutable debug settings to reduce...
Marek Behún [Tue, 18 Jun 2024 15:34:28 +0000 (17:34 +0200)]
ddr: marvell: a38x: debug: Allow compiling with immutable debug settings to reduce binary size

Allow compiling with immutable debug settings:
- DEBUG_LEVEL is always set to DEBUG_LEVEL_ERROR
- register dumps are disabled

This can save around 10 KiB of space in the resulting binary, which is a
lot in U-Boot SPL.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if needed, and make...
Marek Behún [Tue, 18 Jun 2024 15:34:27 +0000 (17:34 +0200)]
ddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if needed, and make them static

The variables is_validate_window_per_if, is_validate_window_per_pup,
sweep_cnt and is_run_leveling_sweep_tests are only used if
DDR_VIEWER_TOOL macro is defined, so define them only in that case.

Make them static since they are only used in ddr3_debug.c.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoddr: marvell: a38x: debug: Remove unused variables
Marek Behún [Tue, 18 Jun 2024 15:34:26 +0000 (17:34 +0200)]
ddr: marvell: a38x: debug: Remove unused variables

The variables is_default_centralization, is_tune_result and
is_bist_reset_bit are never used.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if we won't print...
Marek Behún [Tue, 18 Jun 2024 15:34:25 +0000 (17:34 +0200)]
ddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if we won't print anything

Return from ddr3_tip_print_log() early if we won't print anything
anyway.

This way the compiler can optimize away the VALIDATE_IF_ACTIVE() calls
in the for-loop, so if the SILENT_LIB macro is defined, no code is
generated for the rest of the function, which saves some space.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: mvebu: turris_omnia: Disable ext4 write support in defconfig
Marek Behún [Tue, 18 Jun 2024 15:34:24 +0000 (17:34 +0200)]
arm: mvebu: turris_omnia: Disable ext4 write support in defconfig

Turris Omnia defconfig is nearing image size limit. Disable ext4 write
support to reserve space for more important stuff.

This reduces the size of the KWB image by ~19 KiB.

If in the future U-Boot supports compressing itself and decompressing
on load, we may enable this again.

Signed-off-by: Marek Behún <kabel@kernel.org>
5 months agoarm: dts: mvebu: Update DTS for Thecus N2350 board
Tony Dinh [Mon, 10 Jun 2024 00:34:31 +0000 (17:34 -0700)]
arm: dts: mvebu: Update DTS for Thecus N2350 board

- Change the spi-max-frequency to 50000000 (50 Mhz). According to the
data sheet[1], the MX25L3205D max frequency is 86 Mhz. Using 50 Mhz in
the DTS to ensure u-boot is consistent with what Linux kernel expected.
- Update GPIO fan to conform to the latest DT binding.

[1]
https://www.macronix.com/Lists/Datasheet/Attachments/8575/MX25L3205D,%203V,%2032Mb,%20v1.5.pdf

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
5 months agoarm: mvebu: env_sf_get_env_addr() missing check for CONFIG_ENV_IS_IN_SPI_FLASH
Tony Dinh [Thu, 6 Jun 2024 00:12:01 +0000 (17:12 -0700)]
arm: mvebu: env_sf_get_env_addr() missing check for CONFIG_ENV_IS_IN_SPI_FLASH

The CONFIG_ENV_OFFSET is undefined if boot device is UART
(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART), or envs are not stored on flash
(CONFIG_ENV_IS_NOWHERE). Check for CONFIG_ENV_IS_IN_SPI_FLASH as the first
condition to determine whether env_sf_get_env_addr() should be provided.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
5 months agoconfigs: add mvebu_espressobin_ultra-88f3720_defconfig
Benjamin Schneider [Thu, 30 May 2024 04:47:51 +0000 (21:47 -0700)]
configs: add mvebu_espressobin_ultra-88f3720_defconfig

Add support for a Marvell Armada 3720 device variant

Signed-off-by: Benjamin Schneider <ben@bens.haus>
5 months agoMerge branch '2024-07-05-assorted-updates'
Tom Rini [Fri, 5 Jul 2024 22:36:43 +0000 (16:36 -0600)]
Merge branch '2024-07-05-assorted-updates'

- Re-instate the zlib update, so we can fix it for this release,
  assorted whitespace cleanups, allow mkimage to 'auto-conf' signing of
  scripts, enhance ELF image support, add more HW rev support to e1000
  driver, update am64x_evm config, correct mpc8xxx watchdog, update
  phycore-am6 docs.

5 months agoRevert "Revert "Merge patch series "zlib: Address CVE-2016-9841"""
Tom Rini [Fri, 5 Jul 2024 15:44:54 +0000 (09:44 -0600)]
Revert "Revert "Merge patch series "zlib: Address CVE-2016-9841"""

Now that the release has happened, bring back the update to zlib.

This reverts commit bbacdd3ef7762fbdeab43ceea5205d1fd0f25bbd.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agowatchdog: mpc8xxx: Fix timer value
Christophe Leroy [Thu, 27 Jun 2024 08:26:08 +0000 (10:26 +0200)]
watchdog: mpc8xxx: Fix timer value

Timer value is a 16 bits calculated from the wanted timeout and the
system clock. On powerpc/8xx, a timeout of 2s gives a value which
is over U16_MAX so U16_MAX shall be used. But the calculation is
casted to u16 so at the end the result is 63770 instead of 128906.

So the timer gets loaded with 63770 instead of 65535. It is not
a big difference in that case, but lets make the code correct and
cast to u32 instead of u16.

Fixes: 26e8ebcd7cb7 ("watchdog: mpc8xxx: Make it generic")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
5 months agopci_ids: fix i225 unprogrammed value
Marjolaine Amate [Mon, 24 Jun 2024 19:49:07 +0000 (19:49 +0000)]
pci_ids: fix i225 unprogrammed value

This patch fixes the I225 hardware default value
at 0x15FD meaning empty flash image
or the NVM configuration loading failed

Signed-off-by: Marjolaine Amate <marjolaine.amate@odyssee-systemes.fr>
5 months agoe1000: add support for i226
Marjolaine Amate [Mon, 24 Jun 2024 19:15:32 +0000 (19:15 +0000)]
e1000: add support for i226

This patch adds support for Intel Foxville I226
devices LM,V,I,K in e1000 driver.

Signed-off-by: Marjolaine Amate <marjolaine.amate@odyssee-systemes.fr>
5 months agoFix Kconfig coding style from spaces to tab
Anand Moon [Sun, 23 Jun 2024 17:40:21 +0000 (23:10 +0530)]
Fix Kconfig coding style from spaces to tab

Adjust indentation from spaces to tab (+optional two spaces) as in
coding style with command like:
$ sed -e 's/^        /\t/' -i */Kconfig

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
5 months agoconfigs: am64x_evm_a53_defconfig: Enable I2C GPIO drivers
Roger Quadros [Sun, 23 Jun 2024 07:41:19 +0000 (10:41 +0300)]
configs: am64x_evm_a53_defconfig: Enable I2C GPIO drivers

The board has the TCA9554 I2C GPIO expander chip for expansion
board presence detection logic.

Enable the relevant I2C GPIO drivers.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
5 months agocmd: bootm: add ELF file support
Maxim Moskalets [Fri, 21 Jun 2024 11:42:10 +0000 (14:42 +0300)]
cmd: bootm: add ELF file support

Some operating systems (e.g. seL4) and embedded applications are ELF
images. It is convenient to use FIT-images to implement trusted boot.
Added "elf" image type for booting using bootm command.

Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
5 months agomkimage: Allow 'auto-conf' signing of scripts
Alexander Dahl [Thu, 20 Jun 2024 14:20:59 +0000 (16:20 +0200)]
mkimage: Allow 'auto-conf' signing of scripts

U-Boot configured for verified boot with the "required" option set to
"conf" also checks scripts put in FIT images for a valid signature, and
refuses to source and run such a script if the signature for the
configuration is bad or missing.  Such a script could not be packaged
before, because mkimage failed like this:

    % tools/mkimage -T script -C none -d tmp/my.scr -f auto-conf -k tmp -g dev -o sha256,rsa4096 my.uimg
    Failed to find any images for configuration 'conf-1/signature'
    tools/mkimage Can't add hashes to FIT blob: -1
    Error: Bad parameters for FIT image type

This is especially unfortunate if LEGACY_IMAGE_FORMAT is disabled as
recommended.

Listing the script configuration in a "sign-images" subnode instead,
would have added even more complexity to the already complex auto fit
generation code.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
5 months agodoc: board: phytec: phycore-am6: Describe UART based boot
Wadim Egorov [Thu, 20 Jun 2024 12:05:54 +0000 (14:05 +0200)]
doc: board: phytec: phycore-am6: Describe UART based boot

Describe how to boot via UART.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
5 months agoconfigs: Remove duplicate newlines
Marek Vasut [Sun, 16 Jun 2024 15:19:11 +0000 (17:19 +0200)]
configs: Remove duplicate newlines

Drop all duplicate newlines from config headers.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
5 months agoMerge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Tom Rini [Fri, 5 Jul 2024 16:22:53 +0000 (10:22 -0600)]
Merge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon

Various minor fixes and improvements:

* Fix Qualcomm SPMI v5 support
* Move default environment to a file
* Add support for special pins (e.g ufs/mmc reset/data pins)
* IPQ moves to OF_UPSTREAM and receives some cleanup and MAINTAINERS
  changes
* Add a reset driver for devices without PSCI
* msm8916 USB clock improvements for mobile devices

5 months agoMerge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Tom Rini [Fri, 5 Jul 2024 14:09:23 +0000 (08:09 -0600)]
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra

Branch contains minor improvemets for existing tegra devices along
with bring up of 4 new devices (ASUS Transformers T20, Microsoft
Surface RT, Lenovo Ideapad Yoga 11 and WEXLER Tab 7t).

5 months agoRevert "CI Changes"
Tom Rini [Fri, 5 Jul 2024 14:07:00 +0000 (08:07 -0600)]
Revert "CI Changes"

This change was brought in by accident, revert.

This reverts commit 51aabf50e57f5139de31a4850347edbad8bb338b.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agospmi: msm: correct max_channels for v5 controllers
Caleb Connolly [Mon, 24 Jun 2024 02:23:29 +0000 (04:23 +0200)]
spmi: msm: correct max_channels for v5 controllers

Commit ee1d8aa5ecf7 ("spmi: msm: support controller version 7") broke
support for channels > 128 on v5 controllers, resulting in some
peripherals (like the power button / pon) working but others (like
gpios) reading bogus data.

Correct max_channels for v5 controllers.

Fixes: ee1d8aa5ecf7 ("spmi: msm: support controller version 7")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agomach-snapdragon: move default environment to a file
Caleb Connolly [Mon, 24 Jun 2024 12:31:59 +0000 (14:31 +0200)]
mach-snapdragon: move default environment to a file

Make use of CONFIG_DEFAULT_ENV_FILE and move the default qcom
environment to a file under board/qualcomm.

This is much cleaner and means we don't need to recompile on changing
the environment.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agospmi: msm: demote to debug()
Caleb Connolly [Mon, 24 Jun 2024 12:46:27 +0000 (14:46 +0200)]
spmi: msm: demote to debug()

Most devices have buttons exposed via the PMIC, the button polling
therefore triggers a log spam if debug logging is enabled.

Demote these to debug() so that they aren't printed unless LOG_DEBUG is
defined explicitly for this file.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agopinctrl: qcom: sm8650: add special pins pins configuration data
Neil Armstrong [Tue, 28 May 2024 08:31:57 +0000 (10:31 +0200)]
pinctrl: qcom: sm8650: add special pins pins configuration data

Add the special pins configuration data to allow setup the bias
of the UFS and SDCard pins on the SM8650 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
5 months agopinctrl: qcom: sm8550: add special pins pins configuration data
Neil Armstrong [Tue, 28 May 2024 08:31:56 +0000 (10:31 +0200)]
pinctrl: qcom: sm8550: add special pins pins configuration data

Add the special pins configuration data to allow setup the bias
of the UFS and SDCard pins on the SM8550 SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
5 months agopinctrl: qcom: add support setting pin configuration for special pins
Neil Armstrong [Tue, 28 May 2024 08:31:55 +0000 (10:31 +0200)]
pinctrl: qcom: add support setting pin configuration for special pins

Use the previously introduced msm_special_pin_data to setup the special
pins configuration if the SoC driver have them specified.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
5 months agoarm: mach-snapdragon: gpio: introduce msm_special_pin_data
Neil Armstrong [Tue, 28 May 2024 08:31:54 +0000 (10:31 +0200)]
arm: mach-snapdragon: gpio: introduce msm_special_pin_data

In order to help setup pin configuration for special pins (UFS, SDCard),
introduce the msm_special_pin_data struct largely inspired from the
Linux conterpart but with only U-Boot required fields.

This struct is added to the pins_data to allow specifying the special
pins data for each SoC.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
5 months agopinctrl: qcom: add support for bias-pull-down
Neil Armstrong [Tue, 28 May 2024 08:31:53 +0000 (10:31 +0200)]
pinctrl: qcom: add support for bias-pull-down

Add support for bias-pull-down as an alternate of bias-pull-up.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
5 months agoclock: qcom: ipq4019: add I2C clocks
Robert Marko [Tue, 28 May 2024 12:31:04 +0000 (14:31 +0200)]
clock: qcom: ipq4019: add I2C clocks

I2C clocks are not initialized by the SBL, so lets add support for clocks
required by both of the QUP I2C controllers.

BLSP1 AHB clock is already initialized by SBL, but QUP I2C driver is
requesting it so we have to add it to the enable list.

Based off QCS404 clock driver.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
5 months agoMAINTAINERS: IPQ40XX: add pinctrl driver
Robert Marko [Wed, 24 Apr 2024 09:46:25 +0000 (11:46 +0200)]
MAINTAINERS: IPQ40XX: add pinctrl driver

Pinctrl drivers were moved to a dedicated directory but the entry was never
updated, so add the pinctrl-ipq4019 driver entry.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
5 months agoMAINTAINERS: IPQ40XX: add clock-ipq4019 instead of reset driver
Robert Marko [Wed, 24 Apr 2024 09:46:24 +0000 (11:46 +0200)]
MAINTAINERS: IPQ40XX: add clock-ipq4019 instead of reset driver

The reset handling was added to the clock drivers but the entry was never
updated, so add the clock-ipq4019 driver instead.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
5 months agoMAINTAINERS: IPQ40XX: update GCC dt-bindings
Robert Marko [Wed, 24 Apr 2024 09:46:23 +0000 (11:46 +0200)]
MAINTAINERS: IPQ40XX: update GCC dt-bindings

The separate clock and reset dt-bindings for IPQ40XX were merged into one
recently, but the entry was not updated so do it now.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
5 months agoMAINTAINERS: IPQ40XX: remove Luka Kovacic as maintainer
Robert Marko [Wed, 24 Apr 2024 09:46:22 +0000 (11:46 +0200)]
MAINTAINERS: IPQ40XX: remove Luka Kovacic as maintainer

Luka Kovacic is no longer at Sartura, so remove him as one of IPQ40xx
maintainers.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
5 months agoarm: dts: drop downstream IPQ4019 DTSI
Robert Marko [Tue, 14 May 2024 10:17:52 +0000 (12:17 +0200)]
arm: dts: drop downstream IPQ4019 DTSI

We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so
lets drop our downstream DTSI.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agomach-ipq40xx: use OF_UPSTREAM
Robert Marko [Tue, 14 May 2024 10:17:51 +0000 (12:17 +0200)]
mach-ipq40xx: use OF_UPSTREAM

Now that drivers are compatible enough with the upstream DTS, there is no
reason to not use the upstream DTS, so imply OF_UPSTREAM by default.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agomach-ipq40xx: add CPU specific code
Robert Marko [Tue, 14 May 2024 10:17:50 +0000 (12:17 +0200)]
mach-ipq40xx: add CPU specific code

Provide basic DRAM info population from DT, cache setting and the
board_init stub.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agosysreset: add Qualcomm PSHOLD reset driver
Robert Marko [Tue, 14 May 2024 10:15:02 +0000 (12:15 +0200)]
sysreset: add Qualcomm PSHOLD reset driver

Number of Qualcomm ARMv7 SoC-s did not use PSCI but rather used PSHOLD
(Qualcomm Power Supply Hold Reset) bit to trigger reset or poweroff.

Qualcomm IPQ40XX is one of them, so provide a simple sysreset driver based
on the upstream Linux one, it is DT compatible as well.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agoehci: msm: bring up iface + core clocks
Sam Day [Mon, 6 May 2024 10:26:58 +0000 (10:26 +0000)]
ehci: msm: bring up iface + core clocks

This seems to be necessary on my samsung-a5. Without this patch, the
first access of EHCI registers causes a bus stall and subsequent reset.

I am unsure why this wasn't already necessary for db410c, perhaps those
clocks are already enabled on boot.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agoclk/qcom: apq8016: add support for USB_HS clocks
Sam Day [Mon, 6 May 2024 10:26:54 +0000 (10:26 +0000)]
clk/qcom: apq8016: add support for USB_HS clocks

The newer "register map for simple gate clocks" support added for qcom
clocks is used. As a result gcc_apq8016 now has a mixture of the old and
new styles. I didn't (and still don't!) feel comfortable enough in this
area to update the existing code.

Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agoqcom_defconfig: enable msm8916 and msm8996
Caleb Connolly [Tue, 7 May 2024 18:46:54 +0000 (18:46 +0000)]
qcom_defconfig: enable msm8916 and msm8996

Enable the clock/pinctrl drivers for these two SoCs. Previously left out
due to only being used on the db410c and db820c respectively which both
have their own board code. We can still boot these with most features
working without that board code.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
5 months agoboard: lenovo: ideapad-yoga-11: add Lenovo Ideapad Yoga 11 support
Jonas Schwöbel [Sat, 2 Apr 2022 20:04:00 +0000 (22:04 +0200)]
board: lenovo: ideapad-yoga-11: add Lenovo Ideapad Yoga 11 support

The Lenovo IdeaPad Yoga 11 is a hybrid laptop/tablet Windows RT-based
computer released in late 2012. The device uses a 1.3 GHz quad-core
Nvidia Tegra 3 chipset with 2 GB of RAM, features a 11.6 inch 1366x768
screen and 32/64 GB of internal memory that can be supplemented with
a microSDXC card slot, full size SD card slot and 2 full size USB 2.0
ports.

Tested-by: Jethro Bull <jethrob@hotmail.com>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoboard: microsoft: surface-rt: add Microsoft Surface RT support
Jonas Schwöbel [Mon, 24 Jan 2022 17:06:33 +0000 (18:06 +0100)]
board: microsoft: surface-rt: add Microsoft Surface RT support

Surface RT is a hybrid tablet computer developed and manufactured
by Microsoft and shipped with Windows RT. The tablet uses a 1.3 GHz
quad-core Nvidia Tegra 3 chipset with 2 GB of RAM, features 10.8
inch 1366x768 screen and 32/64 GB of internal memory that can be
supplemented with a microSDXC card giving up to 200 GB of
additional storage.

Tested-by: Jethro Bull <jethrob@hotmail.com>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoboard: wexler: qc750: add WEXLER Tab 7t support
Svyatoslav Ryhel [Tue, 11 Jul 2023 10:47:02 +0000 (13:47 +0300)]
board: wexler: qc750: add WEXLER Tab 7t support

WEXLER Tab 7t is a mini tablet computer developed by WEXLER that
runs the Android operating system. The device features a 7.0-inch
(180 mm) HD display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM,
8, 16 or 32 GB of storage that can be supplemented with a microSDXC
card giving up to 64 GB of additional storage and a full size USB
port.

Tested-by: Maksim Kurnosenko <asusx2@mail.ru>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoboard: asus: transformer: add ASUS Transformer T20 family support
Svyatoslav Ryhel [Thu, 27 Jan 2022 17:42:04 +0000 (19:42 +0200)]
board: asus: transformer: add ASUS Transformer T20 family support

The Asus Eee Pad Transformer family are 2-in-1 detachable/slider
tablets developed by Asus that run the Android operating system.
The Eee Pad Transformers feature a 10.1-inch (260 mm) display,
an Nvidia Tegra 2 dual-core chip, 1 GB of RAM, and 16/32 GB of storage.
Transformers board derives from Nvidia Ventana development board.

This patch brings support for all 3 known T20 Transformers:
- Asus Eee Pad Transformer TF101
- Asus Eee Pad Transformer TF101G
- Asus Eee Pad Slider SL101

Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> # ASUS TF101
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoarm: tegra20: bct: add missing <vsprintf.h>
Svyatoslav Ryhel [Fri, 5 Jul 2024 07:16:48 +0000 (10:16 +0300)]
arm: tegra20: bct: add missing <vsprintf.h>

Fixes implicit declaration of function 'hextoul'

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoconfigs: transformer: simplify boot command
Svyatoslav Ryhel [Thu, 27 Jun 2024 15:31:41 +0000 (18:31 +0300)]
configs: transformer: simplify boot command

Drop boot device sequence re-definition since now it is default.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoinclude: configs: tegra-common-post: make usb first boot target
Svyatoslav Ryhel [Tue, 18 Jun 2024 10:07:57 +0000 (13:07 +0300)]
include: configs: tegra-common-post: make usb first boot target

This ensures that the device can boot from a USB device prior to MMC. Useful
cases are when installing a new OS from USB while MMC still has a working OS
configuration or if the OS configuration is broken in late boot stages
(kernel boots but the system does not start).

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agovideo: tegra20: dc: use nvidia,head property to identify DC controller
Svyatoslav Ryhel [Tue, 14 May 2024 06:05:00 +0000 (09:05 +0300)]
video: tegra20: dc: use nvidia,head property to identify DC controller

Use existing nvidia,head device tree property to get DC controller id.

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoconfigs: paz00: enable EDID support
Svyatoslav Ryhel [Sun, 2 Jun 2024 13:26:39 +0000 (16:26 +0300)]
configs: paz00: enable EDID support

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
5 months agoMerge patch series "xtensa: Enable qemu-xtensa board"
Tom Rini [Thu, 4 Jul 2024 22:11:08 +0000 (16:11 -0600)]
Merge patch series "xtensa: Enable qemu-xtensa board"

Jiaxun Yang <jiaxun.yang@flygoat.com> says:

Hi all,

This series enabled qemu-xtensa board.

For dc232b CPU it needs to be built with toolchain[1].

This is a side product of me investigating architectures
physical address != virtual address in U-Boot. Now we can
get it covered under CI and regular tests.

VirtIO devices are not working as expected, due to U-Boot's
assumption on VA == PA everywhere, I'm going to get this fixed
later.

My Xtensa knowledge is pretty limited, Xtensa people please
feel free to point out if I got anything wrong.

Thanks
[1]: https://github.com/foss-xtensa/toolchain/releases/download/2020.07/x86_64-2020.07-xtensa-dc232b-elf.tar.gz

5 months agoCI Changes
Jiaxun Yang [Tue, 18 Jun 2024 13:56:12 +0000 (14:56 +0100)]
CI Changes

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoci: Wire up qemu_xtensa_dc233c
Jiaxun Yang [Tue, 18 Jun 2024 13:56:11 +0000 (14:56 +0100)]
ci: Wire up qemu_xtensa_dc233c

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agodoc: New documentation for qemu-xtensa
Jiaxun Yang [Tue, 18 Jun 2024 13:56:10 +0000 (14:56 +0100)]
doc: New documentation for qemu-xtensa

Introduce the board and provide instructions on how to get
it work.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoboard: emulation: New board qemu-xtensa
Jiaxun Yang [Tue, 18 Jun 2024 13:56:09 +0000 (14:56 +0100)]
board: emulation: New board qemu-xtensa

Introduce the new board, define every bits.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agodts/upsteam: Add Makefile for xtensa
Jiaxun Yang [Tue, 18 Jun 2024 13:56:08 +0000 (14:56 +0100)]
dts/upsteam: Add Makefile for xtensa

It is required to get it xtensa OF_UPSTREAM work.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agodrivers: cpu: Add xtensa CPU driver
Jiaxun Yang [Tue, 18 Jun 2024 13:56:07 +0000 (14:56 +0100)]
drivers: cpu: Add xtensa CPU driver

Implement various CPU related functions.
I'm actually just using it to get cpu clock frequency.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agodrivers: serial: Add xtensa semihosting driver
Jiaxun Yang [Tue, 18 Jun 2024 13:56:06 +0000 (14:56 +0100)]
drivers: serial: Add xtensa semihosting driver

Add xtensa semihosting driver.

It can't use regular semihosting driver as Xtensa's has it's own
semihosting ABI.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoxtensa: Bring in semihosting headers and config options
Jiaxun Yang [Tue, 18 Jun 2024 13:56:05 +0000 (14:56 +0100)]
xtensa: Bring in semihosting headers and config options

They are all directly imported from Linux kernel.

Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoxtensa: Define PLATFORM_ELFFLAGS
Jiaxun Yang [Tue, 18 Jun 2024 13:56:04 +0000 (14:56 +0100)]
xtensa: Define PLATFORM_ELFFLAGS

u-boot.elf target requires it to work.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoxtensa: Implement phys virt conversion for PTP_MMU
Jiaxun Yang [Tue, 18 Jun 2024 13:56:03 +0000 (14:56 +0100)]
xtensa: Implement phys virt conversion for PTP_MMU

For PTP_MMU our physical address is not directly mapped
into virtual address space, we need to access physical
memory from those fixed map segments.

Implement phys_to_virt and virt_to_phys hook to reflect
this setting.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoxtensa: Correct define of _end symbol
Jiaxun Yang [Tue, 18 Jun 2024 13:56:02 +0000 (14:56 +0100)]
xtensa: Correct define of _end symbol

So U-Boot is using _end symbol to detect location of devicetree
appended at the end of the ROM.

It needs to be calculated based on end of .data load address,
as in our lds .current address is address in RAM.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoxtensa: Move dram_init to xtfpga board file
Jiaxun Yang [Tue, 18 Jun 2024 13:56:01 +0000 (14:56 +0100)]
xtensa: Move dram_init to xtfpga board file

This is a board level stuff.

Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
5 months agoCI: Make pytest export JUnitXML
Tom Rini [Thu, 27 Jun 2024 13:43:20 +0000 (07:43 -0600)]
CI: Make pytest export JUnitXML

Both GitLab and Azure (and other CI systems) have native support for
displaying JUnitXML test report results. The pytest framework that we
use can generate these reports. Change our CI tests so that they will
generate these reports and then have the respective CI platform pick
them up. We write to different locations because of where each CI is
(and isn't) able to easily pass things along.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agotest/py/tests: Update some network dependencies
Tom Rini [Tue, 18 Jun 2024 20:23:43 +0000 (14:23 -0600)]
test/py/tests: Update some network dependencies

On tests which require "tftpboot" we need to depend not on cmd_net but
rather cmd_tftpboot. And on tests which require cmd_pxe we do not need
to also depend on cmd_net as this should be handled already via Kconfig
logic.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agoMerge patch series "testb: Various tweaks and fixes for Labgrid"
Tom Rini [Thu, 4 Jul 2024 15:25:51 +0000 (09:25 -0600)]
Merge patch series "testb: Various tweaks and fixes for Labgrid"

Simon Glass <sjg@chromium.org> says:

This series includes a number of mostly unrelated changes which are in
service of running U-Boot on a lab using Labgrid.

5 months agosmbios: Correct error handling when writing tables
Simon Glass [Sun, 23 Jun 2024 20:30:33 +0000 (14:30 -0600)]
smbios: Correct error handling when writing tables

Since write_smbios_table() returns an address, we cannot use it to
return and error number. Also, failing on sysinfo_detect() breaks
existing boards, e.g. chromebook_link

Correct this by logging and swallowing the error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: a5a57562856 ("lib: smbios: Detect system properties via...")
5 months agotest: Check help output
Simon Glass [Sun, 23 Jun 2024 20:30:31 +0000 (14:30 -0600)]
test: Check help output

The current test doesn't check anything about the output. If a bug
results in junk before the output, this is not currently detected.

Add a check for the first line being the one expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agotest: Decode exceptions only with sandbox
Simon Glass [Sun, 23 Jun 2024 20:30:30 +0000 (14:30 -0600)]
test: Decode exceptions only with sandbox

When a real board fails we don't want to decode the exception. Reserve
that behaviour for sandbox. Also avoid raising a new exception on
failure - just re-raise the existing one.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agotest: dm: Show failing driver name
Simon Glass [Sun, 23 Jun 2024 20:30:29 +0000 (14:30 -0600)]
test: dm: Show failing driver name

When a driver is not registered properly it is not clear which one it
is. Adjust test_dm_compat() to show this.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agolog: Allow tests to pass with CONFIG_LOGF_FUNC_PAD set
Simon Glass [Sun, 23 Jun 2024 20:30:28 +0000 (14:30 -0600)]
log: Allow tests to pass with CONFIG_LOGF_FUNC_PAD set

This setting pads out the function names. Adjust the test to handle
this, since some boards use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agotest: Make bootstd init run only on sandbox
Simon Glass [Sun, 23 Jun 2024 20:30:27 +0000 (14:30 -0600)]
test: Make bootstd init run only on sandbox

Tests for standard boot need disks to be set up, which can only be done
on sandbox, since adjusting disks on real hardware is not currently
supported. Mark the init function as sandbox-only.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agogoogle: Disable TPMv2 on most Chromebooks
Simon Glass [Sun, 23 Jun 2024 20:30:25 +0000 (14:30 -0600)]
google: Disable TPMv2 on most Chromebooks

This feature is not present on older Chromebooks, so disable the
setting.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 months agosunxi: Mark scp as optional
Simon Glass [Sun, 23 Jun 2024 20:30:24 +0000 (14:30 -0600)]
sunxi: Mark scp as optional

This binary does not prevent the system from booting. Mark it optional
so that U-Boot can be built without it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
5 months agoam33xx: Provide a function to set up the debug UART
Simon Glass [Sun, 23 Jun 2024 20:30:23 +0000 (14:30 -0600)]
am33xx: Provide a function to set up the debug UART

Since commit 0dba45864b2a ("arm: Init the debug UART") the debug UART is
set up in _main() before early_system_init() is called.

Add a suitable board_debug_uart_init() function to set up the UART in
SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agoinitcall: Correct use of relocation offset
Simon Glass [Sun, 23 Jun 2024 20:30:22 +0000 (14:30 -0600)]
initcall: Correct use of relocation offset

The relocation offset can change in some initcall sequences. Handle
this and make sure it is used for all debugging statements in
init_run_list()

Update the trace test to match.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
5 months agodm: core: Enhance comments on bind_drivers_pass()
Simon Glass [Sun, 23 Jun 2024 20:30:21 +0000 (14:30 -0600)]
dm: core: Enhance comments on bind_drivers_pass()

This part of driver model is a little subtle, so add some more comments
to promote better understanding.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agotrace: Update test to tolerate different trace-cmd version
Simon Glass [Sun, 23 Jun 2024 20:30:20 +0000 (14:30 -0600)]
trace: Update test to tolerate different trace-cmd version

Some versions of trace-cmd (or some machines?) show one less dot in the
CPU list.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 months agoMerge patch series "cmd: avoid duplicate weak functions"
Tom Rini [Wed, 3 Jul 2024 20:44:12 +0000 (14:44 -0600)]
Merge patch series "cmd: avoid duplicate weak functions"

Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:

[trini: Patch 1/3 was replaced by my series merged just prior to this,
 Heinrich's cover letter is lightly edited and any mistakes are my own]

If we have multiple weak implementations of functions, the linker might
choose any of these.

The EFI sub-systems uses invalidate_icache_all() after loading binaries.
Both the EFI sub-system and cmd/cache.c provide a weak
invalidate_icache_all() function. Remove the EFI instance.

For ARM11 functional implementation of invalidate_icache_all is missing.
Add it.

5 months agoefi_loader: avoid duplicate weak invalidate_icache_all()
Heinrich Schuchardt [Sun, 16 Jun 2024 17:31:05 +0000 (19:31 +0200)]
efi_loader: avoid duplicate weak invalidate_icache_all()

If multiple weak implementations of a weak function exist, it is unclear
which one the linker should chose. cmd/cache.c already defines a weak
invalidate_icache_all().

We don't need a call to invalidate_icache_all() on x86.
ARM, RISC-V, and Sandbox provide an implementation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 months agoarm: implement invalidate_icache_all on ARM11
Heinrich Schuchardt [Sun, 16 Jun 2024 17:31:04 +0000 (19:31 +0200)]
arm: implement invalidate_icache_all on ARM11

In EFI sub-system we rely on invalidate_icache_all() to invalidate the
instruction cache after loading binaries. Add the missing implementation on
ARM1136, ARM1176.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 months agoMerge patch series "m68k: Implement a default flush_dcache_all"
Tom Rini [Wed, 3 Jul 2024 20:42:11 +0000 (14:42 -0600)]
Merge patch series "m68k: Implement a default flush_dcache_all"

Tom Rini <trini@konsulko.com> says:

Prior to this series we had some de-facto required cache functions that
were either unimplemented on some architectures or differently named.
This would lead in some cases to having multiple "weak" functions
available as well. Rework things so that an architecture must provide
these functions and it is up to that architecture if a "weak" default
function makes sense, or not.

5 months agocmd: cache: Remove weak functions
Tom Rini [Wed, 19 Jun 2024 21:27:59 +0000 (15:27 -0600)]
cmd: cache: Remove weak functions

It should be up to an architecture to decide how to implement cache
functions, and if they need to use weak functions or not. Allowing the
cache command to be built without cache functionality implemented is
unhelpful. Further, guard the call to noncached_set_region with
CONFIG_SYS_NONCACHED_MEMORY as that's when it's implemented and again is
an architecture specific detail.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agopowerpc: Add the old invalidate_icache_all function
Tom Rini [Wed, 19 Jun 2024 21:27:58 +0000 (15:27 -0600)]
powerpc: Add the old invalidate_icache_all function

Add the old invalidate_icache_all function that prints a warning that
was previously found in cmd/cache.c

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agopowerpc: Implement a default flush_dcache_all
Tom Rini [Wed, 19 Jun 2024 21:27:57 +0000 (15:27 -0600)]
powerpc: Implement a default flush_dcache_all

Implement a weak default version of flush_dcache_all which is based on
the ARM default, which is to flush the entire range via
flush_dcache_range(...).

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agosh: Add the old invalidate_icache_all function
Tom Rini [Wed, 19 Jun 2024 21:27:56 +0000 (15:27 -0600)]
sh: Add the old invalidate_icache_all function

Add the old invalidate_icache_all function that prints a warning that
was previously found in cmd/cache.c

Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agosh: Implement a default flush_dcache_all
Tom Rini [Wed, 19 Jun 2024 21:27:55 +0000 (15:27 -0600)]
sh: Implement a default flush_dcache_all

Implement a weak default version of flush_dcache_all which is based on
the ARM default, which is to flush the entire range via
flush_dcache_range(...).

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agom68k: Rename icache_invalid to invalidate_icache_all
Tom Rini [Wed, 19 Jun 2024 21:27:54 +0000 (15:27 -0600)]
m68k: Rename icache_invalid to invalidate_icache_all

The implementation of icache_invalid appears to be doing what other
architectures call invalidate_icache_all so rename to match.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agom68k: Implement a default flush_dcache_all
Tom Rini [Wed, 19 Jun 2024 21:27:53 +0000 (15:27 -0600)]
m68k: Implement a default flush_dcache_all

Implement a weak default version of flush_dcache_all which is based on
the ARM default, which is to flush the entire range via
flush_dcache_range(...).

Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 months agoMerge tag 'ubifixes-for-v2024-10-rc1' of https://source.denx.de/u-boot/custodians...
Tom Rini [Wed, 3 Jul 2024 15:06:07 +0000 (09:06 -0600)]
Merge tag 'ubifixes-for-v2024-10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-ubi

ubi changes for v2024.10-rc1

fs: ubifs: Add support for ZSTD decompression
  from Piotr Wojtaszczyk

Fixes for ubi command from Martin Kurbanov

5 months agoMerge tag 'dm-pull-2jun24-take2' of https://source.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Wed, 3 Jul 2024 15:05:52 +0000 (09:05 -0600)]
Merge tag 'dm-pull-2jun24-take2' of https://source.denx.de/u-boot/custodians/u-boot-dm

buildman CI improvements
binman fixes and assumed size
partial tools fixes for Python 3.12
patman enhancements

5 months agobootstd: cros: store partition type in an efi_guid_t
Vincent Stehlé [Thu, 27 Jun 2024 17:06:29 +0000 (19:06 +0200)]
bootstd: cros: store partition type in an efi_guid_t

The scan_part() function uses a struct uuid to store the little-endian
partition type GUID, but this structure should be used only to contain a
big-endian UUID. Use an efi_guid_t instead.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>