Simon Glass [Wed, 5 Apr 2017 22:23:36 +0000 (16:23 -0600)]
arm: rpi: Add a file to handle messages
The bcm283x chips provide a way for the ARM core to communicate with the
graphics processor, which is in charge of many things. This is handled by
way of a message prototcol.
At present the code for sending message (and receiving a reply) is spread
around U-Boot, primarily in the board file. This means that sending a
message from a driver requires duplicating the code.
Create a new message implementation with a function to support powering on
a subsystem as a starting point.
Simon Glass [Wed, 5 Apr 2017 22:23:31 +0000 (16:23 -0600)]
string: Use memcpy() within memmove() when we can
A common use of memmove() can be handled by memcpy(). Also memcpy()
includes an optimisation for large sizes: it copies a word at a time. So
we can get a speed-up by calling memcpy() to handle our move in this case.
Update memmove() to call memcpy() if the destination is before the source.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 5 Apr 2017 22:23:28 +0000 (16:23 -0600)]
net: smsc95xx: Correct free_pkt() implementation
On further review this returns the wrong packet length from the driver.
It may not be noticed since protocols will take care of it. Fix it by
subtracting the header length from the packet length returned.
defconfig: dra7xx_evm: enable CONFIG_BLK and disk driver model for SCSI
Enable disk driver model for dra7xx_evm as dwc_ahci supports
driver model. As a consequence we must also enable CONFIG_BLK and
CONFIG_DM_USB.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped CONFIG_SPL_PHY=y in sandbox_spl to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device
Implement a sata driver for Synopsys DWC sata device based on
U-boot driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This phy is found on omap platforms with sata capabilities.
Except for the part related to the DM and the PHY framework, the code is
basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The DM version of scsi_scan() is becoming a bit long, it can be split:
scsi_scan() iterates over the IDs and LUNs and for each id/lun pair calls
do_scsi_scan_one() to do the work of:
- detecting an attached drive
- creating the associated block device if a drive is found.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 07:31:00 +0000 (15:31 +0800)]
configs: at91sam9263ek: Update for DT and DM support
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 07:28:27 +0000 (15:28 +0800)]
configs: at91sam9rlek: Update for DT and DM support
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 07:18:47 +0000 (15:18 +0800)]
configs: at91sam9260ek/9g20ek: Update for DT and DM
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 07:15:48 +0000 (15:15 +0800)]
configs: at91sam9m10g45ek: Update to support DM/DT
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 06:54:51 +0000 (14:54 +0800)]
configs: at91sam9n12ek: Update for DT and DM support
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 06:51:54 +0000 (14:51 +0800)]
configs: at91sam9x5ek: Update to support DM/DT
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 05:49:39 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9263ek
The device tree source files of at91sam9263ek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 05:49:38 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9rlek
The device tree source files of at91sam9rlek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 05:49:37 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9260ek/9g20ek
The device tree source files of at91sam9g20ek and at91sam9260ek
boards are copied from the Linux v4.10, do the changes below.
- Fix the build error for the usb0 node.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
in board_init_f stage.
- Add the clk pinctrl of the mmc0 node.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 05:49:36 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9m10g45ek
The device tree source files of at91sam9m10g45ek boards are copied
from the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 05:49:35 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9n12ek
The device tree source files of at91sam9n12ek boards are copied from
the Linux v4.10, do the changes as below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Change the compatible of the spi flash to "spi-flash".
- Add the spi0 aliases.
- Fix the pinctrl-names of mmc0 node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Tue, 18 Apr 2017 05:49:34 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9x5ek
The device tree source files of at91sam9x5ek board are copied from
the Linux v4.10, do the changes below.
- Add the reg property for the pinctrl node.
- Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
slibling nodes, instead of the child nodes.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
- Change the compatible of the spi flash to "spi-flash".
- Add the spi0 aliases.
- Fix the compilation warnings.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Fri, 14 Apr 2017 07:01:27 +0000 (15:01 +0800)]
serial: atmel_usart: Fix early debug not work in SPL
Add the uart init function to be used on both probe and the early
debug uart init. For the latter, the input clock should be from
CONFIG_DEBUG_UART_CLOCK.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Fri, 14 Apr 2017 06:36:04 +0000 (14:36 +0800)]
net: macb: Add remove callback
To avoid the failure of mdio_register(), add the remove callback
to unregister the mii_dev when removing the ethernet device.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fixed up unused variable warning, e.g. for gurnard: Signed-off-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Fri, 24 Mar 2017 01:26:16 +0000 (09:26 +0800)]
configs: sama5d3xek: add default config for CMP board
The sama5d36ek CMP board is the variant of sama5d3xek board.
It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865, and
some power rails. The board is mainly used to measure the power
consumption. As all those changes are done in at91bootstrap,
in U-Boot, only use another device tree file, no code needed
to change.
As there is additional power consumption when enbling the USB
Host and USB device, for the power consumption measurement
intention, disable the USB host and device.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Wenyou Yang [Thu, 23 Mar 2017 06:26:28 +0000 (14:26 +0800)]
configs: sama5d2_xplained: update for SPL
Enable config options to support the SPL, increase the malloc
memory size for the SPL and board_init_f stage and increase
the memory space for the SPL binary.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Wenyou Yang [Thu, 23 Mar 2017 06:26:25 +0000 (14:26 +0800)]
board: sama5d2_xplained: clean up macb init code
Because the MACB driver supports the driver model and device tree,
the pins configuration and clock enabling are handled by the
pinctrl driver and clock driver, remove this hardcoded init code.
The USB Ether init code is removed as well.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Maxim Sloyko [Tue, 9 May 2017 13:08:07 +0000 (09:08 -0400)]
dm: Update Simple Watchdog uclass
- Remove "probe" function from sandbox wdt driver
- Fix include order
Fixes: 0753bc2d30d7 ("dm: Simple Watchdog uclass") Signed-off-by: Maxim Sloyko <maxims@google.com>
[trini: Create as the delta between v1 (applied) and v2 (should have
applied)]. Signed-off-by: Tom Rini <trini@konsulko.com>
arm64: mvebu: Fix the bubt comamnd NAND device support
Fix the NAND structures in bubt command according to latest
changes in MTD API.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
fix: nand: pxa3xx: Remove hardcode values from the driver
Obtain NAND controller setup parameters from the device
tree instead of using hardcoded values.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Scott Wood <oss@buserror.net> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Igal Liberman [Mon, 24 Apr 2017 15:45:28 +0000 (18:45 +0300)]
phy: marvell: cp110: add 5G XFI mode
This patch adds the option to configure a comphy to 5G XFI mode.
In order to configure the comphy to 5G XFI, update
the comphy node in the device-tree:
phy2 {
phy-type = <PHY_TYPE_SFI>;
phy-speed = <PHY_SPEED_5_15625G>;
};
Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
Align PHY selectors register with Armada-CP-110 functional SPEC
update all relevant device trees with this change.
Signed-off-by: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Igal Liberman [Mon, 24 Apr 2017 15:45:26 +0000 (18:45 +0300)]
fix: phy: marvell: cp110: sata: update analog parameters according to latest ETP
Add SATA analog parameters initialization values according to
latest ETP.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Apr 2017 15:45:24 +0000 (18:45 +0300)]
phy: marvell: add IGNORE COMPHY type
This type tells u-boot to preserve the COMPHY settings as is
it is usefull in situations where the COMPHY was initialized by
earlier firmware.
Note that IGNORE is different from UNCONNECTED since setting
UNCONNECTED type will disconnect the COMPHY in the COMPHY MUX
which is a desired behaviour
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Apr 2017 15:45:23 +0000 (18:45 +0300)]
phy: marvell: cp110: update utmi phy connection type
UTMI_PHY_TO_USB_HOST was used in USB3 UTMI dts node only, but there will
be USB2 UTMI dts node for some SoCs that have got USB2 controller, so rename
TO_USB_HOST to TO_USB3_HOST to distinguish TO_USB2_HOST in later on patches.
Signed-off-by: zachary <zhangzg@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Apr 2017 15:45:22 +0000 (18:45 +0300)]
phy: marvell: cp110: add support for end point configuration
The serdes was always configured in root complex mode.
this patch add new entry in device tree (per serdes)
which indicates whether the serdes is in end point mode.
if so, it skips the root complex configuration.
Signed-off-by: Haim Boot <hayim@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Use local static counter for maintaining the COMPHY chip-ID
upon its initialization.
The dev->seq originally used as the COMPHY chip-ID depends
on the device tree scan order and produces wrong results
that breaks the deficated PHYs init flow, which in turn
breaks the USB support.
Change-Id: I4e3f7ec36590a7f95dc94d9269a3c47fb708c4a9 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Add NAND configuration parameters to A8K shared config file.
Add defconfig for db-88f7040 board with boot from NAND setup.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
arm64: a8k: dts: Add support for NAND devices on A8K platform
Add NAND to CP master device tree. Add armada-7040-db-nand
device tree for the board configured with NAND boot device.
Add comment about boot device ID to armada-7040-db DTS.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
Implement mvebu_get_nand_clock call for A8K family.
This function is used by PXA3XX NAND driver.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
arm64: mvebu: Trigger PCI devices scan at early init stage
Add PCIe initialization at early init stage.
This operation has a side effect of detecting all PCIe
plug-in cards, so the operator is not obligated to issue
"pci enum" command though CLI for this purpose.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
mvebu: dts: a80x0: Sync the DB DTS with standard config A
Sync the default configuration of Armada-8040-DB with
Marvell u-boot-2015 standard configuration "A" for the same board.
The standard configuration "A" enables 2 PCIe slots on CP0
and 3 PCIe slots on CP1.
This is the main configuration used for u-boot and Linux tests.
This patch also re-arranges the DTS file entries by grouping
all nodes related to CP0 and CP1.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
This patch allows probing all PCIe nodes defined in DTS
even if there no device connected to such node (no link).
Without this fix the driver returns -ENODEV when the PCIe
link is down. As result the pci_init function stops
scanning bus on first empty PCIe slot and all devices
located in higher numbered buses are not discovered.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
ti: common: board_detect: Set alen to expected value before i2c read
In non DM I2C read operations the address length passed in during a read
operation will be used automatically. However, in DM I2C the address length
is set to a default value of one which causes problems when trying to
perform a read with a differing alen. Therefore, before the first read in a
series of read operations set the alen to the correct value.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
ti: common: board_detect: Introduce function to set the address length.
Reading from the I2C EEPROM used typically requires using an address length
of 2. However, when using DM for I2C the default address length used is 1.
To fix this introduce a new function that allows the address length to be
changed. The logic to do so was copied from cmd/i2c.c.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
i2c: davinci: Split functions into two parts for future DM support
The i2c driver will be converted to support device model. In preparation
for that change split the various functions into two parts. This will
allow device model specific driver to reuse the majority of the code from
the non device model implementation.
Also rename the probe function to probe_chip to better reflect its
purpose.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Lokesh Vutla [Wed, 3 May 2017 11:28:26 +0000 (16:58 +0530)]
ARM: keystone2: Add support for getting external clock dynamically
One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 3 May 2017 11:28:25 +0000 (16:58 +0530)]
ARM: k2g: Add support for dynamic programming of PLL based on SYSCLK
K2G supports various sysclk frequencies which can be
determined using sysboot pins. PLLs should be configured
based on this sysclock frequency. Add PLL configurations
for all supported sysclk frequencies.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
projects / u-boot.git / log
