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3 months agophy: Extend generic_setup_phy() with PHY mode and submode
Marek Vasut [Sun, 8 Sep 2024 21:09:03 +0000 (23:09 +0200)]
phy: Extend generic_setup_phy() with PHY mode and submode

Extend generic_setup_phy() parameter list with PHY mode and submode and
call generic_phy_set_mode() in generic_setup_phy(), so the generic PHY
setup function can configure the PHY into correct mode before powering
the PHY up.

Update all call sites of generic_setup_phy() as well, all of which are
USB host related, except for DM test which now behaves as a USB host
test.

Note that if the PHY driver does not implement the .set_mode callback,
generic_phy_set_mode() call returns 0 and does not error out, so this
should not break any existing systems.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 months agobuildman: Support building within a Python venv
Simon Glass [Thu, 15 Aug 2024 19:57:44 +0000 (13:57 -0600)]
buildman: Support building within a Python venv

The Python virtualenv tool sets up a few things in the environment,
putting its path first in the PATH environment variable and setting up
a sys.prefix different from the sys.base_prefix value.

At present buildman puts the toolchain path first in PATH so that it can
be found easily during the build. For sandbox this causes problems since
/usr/bin/gcc (for example) results in '/usr/bin' being prepended to the
PATH variable. As a result, the venv is partially disabled.

The result is that sandbox builds within a venv ignore the venv, e.g.
when looking for packages.

Correct this by detecting the venv and adding the toolchain path after
the venv path.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 months agoregulator: fixed: fix regulator-fixed-clock
John Keeping [Tue, 9 Jul 2024 09:24:54 +0000 (10:24 +0100)]
regulator: fixed: fix regulator-fixed-clock

For regulator-fixed-clock, the device's private data is never set so in
fixed_clock_regulator_set_enable() is null and the function cannot
complete successfully.

Rename the _plat structure to _priv to better represent its role and set
this as the private data.  As shown by the set_enable() function and by
using the same .of_to_plat hook as regulator-fixed, the platform data is
regulator_common_plat so also set .plat_auto correctly.

Finally, set up the private data by adding a .probe function to look up
the clock and set the member variable.

Fixes: f3b5100aff3 ("regulator: fixed: add possibility to enable by clock")
Signed-off-by: John Keeping <jkeeping@inmusicbrands.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agopower: regulator: tps6287x: Add driver for TPS6287x step down convertors
Keerthy [Fri, 31 May 2024 05:50:41 +0000 (11:20 +0530)]
power: regulator: tps6287x: Add driver for TPS6287x step down convertors

Add driver for TPS6287x step down convertors

Data sheet: https://www.ti.com/lit/ds/slvsgc5a/slvsgc5a.pdf

Signed-off-by: Keerthy <j-keerthy@ti.com>
3 months agommc: consider cd-gpios in Synopsys DesignWare driver
Heinrich Schuchardt [Sun, 21 Jul 2024 06:59:07 +0000 (08:59 +0200)]
mmc: consider cd-gpios in Synopsys DesignWare driver

The JH7110 SoC uses a GPIO for card detect.

* In the of_to_plat function check if a cd-gpios definition exists and
  request the GPIO.
* In the getcd function return the GPIO value in this case.

Reported-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 months agommc: msm_sdhci: program core_vendor_spec
Caleb Connolly [Fri, 21 Jun 2024 01:53:09 +0000 (03:53 +0200)]
mmc: msm_sdhci: program core_vendor_spec

After resetting the host controller, program in the POR val for this
register just like the Linux driver does.

This seems to help with initialization when running U-Boot as the primary
bootloader on some boards.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
3 months agommc: Change the frequency to MMC_HS_52 when selecting hs400
Venkatesh Yadav Abbarapu [Tue, 23 Apr 2024 05:30:57 +0000 (11:00 +0530)]
mmc: Change the frequency to MMC_HS_52 when selecting hs400

Per JESD84-B51 P47, host need to change frequency to <=52MHz
after setting HS_TIMING to 0x1, and host need to set the
8-bit DDR buswidth. Currently setting the frequency to 26MHz
and trying to switch 8-bit DDR buswidth resulting timeouts.

mmc dev 1 0
Select HS400 failed -110
switch to partitions #0, OK
mmc1(part 0) is current device

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
3 months agommc: sdhci-cadence: Add support for Cadence sdmmc v6
Kuan Lim Lee [Tue, 28 Nov 2023 06:38:30 +0000 (14:38 +0800)]
mmc: sdhci-cadence: Add support for Cadence sdmmc v6

Cadence SDMMC v6 controller has a lot of changes on initialize
compared to v4 controller. PHY is needed by v6 controller.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
Co-developed-by: Alex Soo <yuklin.soo@starfivetech.com>
Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 months agoMerge patch series "provide names for emmc hardware partitions"
Tom Rini [Thu, 5 Sep 2024 18:13:24 +0000 (12:13 -0600)]
Merge patch series "provide names for emmc hardware partitions"

Tim Harvey <tharvey@gateworks.com> says:

Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
 Boot Area Partition 1
 Boot Area Partition 2
 RPMB Partition
 General Purpose Partition 1
 General Purpose Partition 2
 General Purpose Partition 3
 General Purpose Partition 4
 User Data Area

These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
  0x0: No boot acknowledge sent (default
  0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
  0x0: Device not boot enabled (default)
  0x1: Boot Area partition 1 enabled for boot
  0x2: Boot Area partition 2 enabled for boot
  0x3-0x6: Reserved
  0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
  0x0: No access to boot partition (default)
  0x1: Boot Area partition 1
  0x2: Boot Area partition 2
  0x3: Replay Protected Memory Block (RPMB)
  0x4: Access to General Purpose partition 1
  0x5: Access to General Purpose partition 2
  0x6: Access to General Purpose partition 3
  0x7: Access to General Purpose partition 4

Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.

You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.

U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:
EXT_CSD_BOOT_ACK_ENABLE                 (1 << 6)
EXT_CSD_BOOT_PARTITION_ENABLE           (1 << 3)
EXT_CSD_PARTITION_ACCESS_ENABLE         (1 << 0)
EXT_CSD_PARTITION_ACCESS_DISABLE        (0 << 0)

EXT_CSD_BOOT_ACK(x)             (x << 6)
EXT_CSD_BOOT_PART_NUM(x)        (x << 3)
EXT_CSD_PARTITION_ACCESS(x)     (x << 0)

EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1)
EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7)
EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7)

There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field used by the various mmc_switch incarnations.

To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.

Additionally provide arrays of the field names and allow those to be
used in the 'mmc partconf' command and in board support files.

The first patch adds enumerated types and makes use of them which
represents no compiled code change.

The 2nd patch adds the array of names and uses them in the 'mmc
partconf' command.

The 3rd patch uses the array of hardware partition names in a board
support file to show what emmc hardware partition U-Boot is being loaded
from.

3 months agovenice: show emmc boot hardware partition
Tim Harvey [Fri, 31 May 2024 15:36:35 +0000 (08:36 -0700)]
venice: show emmc boot hardware partition

To aid in understanding what emmc hardware partition is being
used to boot on power-up, display the hardware partition name in the
SPL.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
3 months agommc: allow use of hardware partition names for mmc partconf
Tim Harvey [Fri, 31 May 2024 15:36:34 +0000 (08:36 -0700)]
mmc: allow use of hardware partition names for mmc partconf

eMMC v4+ devices have hardware partitions that are accessed via the
PARTITION_CONFIG (Extended CSD Register 179) PARTITION_ACCESS
and BOOT_PARTITION_ENABLE fields defined as:
bit 5:3: BOOT_PARTITION_ENABLE
  0x0: Device not boot enabled (default)
  0x1: Boot Area partition 1 enabled for boot
  0x2: Boot Area partition 2 enabled for boot
  0x3-0x6: Reserved
  0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
  0x0: No access to boot partition (default)
  0x1: Boot Area partition 1
  0x2: Boot Area partition 2
  0x3: Replay Protected Memory Block (RPMB)
  0x4: Access to General Purpose partition 1
  0x5: Access to General Purpose partition 2
  0x6: Access to General Purpose partition 3
  0x7: Access to General Purpose partition 4

Add char arrays to provide names for these values.

Use these names which displaying or setting the PARTITION_CONFIG
register via the 'mmc partconf' command.

Before:
u-boot=> mmc partconf 2 1 1 0 && mmc partconf 2
EXT_CSD[179], PARTITION_CONFIG:
BOOT_ACK: 0x1
BOOT_PARTITION_ENABLE: 0x2
PARTITION_ACCESS: 0x0

After:
u-boot=> mmc partconf 2 1 1 0 && mmc partconf 2
EXT_CSD[179], PARTITION_CONFIG:
BOOT_ACK: 0x1
BOOT_PARTITION_ENABLE: 0x1 (boot0)
PARTITION_ACCESS: 0x0 (user)
u-boot=> mmc partconf 2 1 boot1 0 && mmc partconf 2
EXT_CSD[179], PARTITION_CONFIG:
BOOT_ACK: 0x1
BOOT_PARTITION_ENABLE: 0x2 (boot1)
PARTITION_ACCESS: 0x0 (user)

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
3 months agommc: use an enumerated type to represent PARTITION_CONFIG fields
Tim Harvey [Fri, 31 May 2024 15:36:33 +0000 (08:36 -0700)]
mmc: use an enumerated type to represent PARTITION_CONFIG fields

Modern eMMC v4+ devices have multiple hardware partitions per the JEDEC
specification described as:
  Boot Area Partition 1
  Boot Area Partition 2
  RPMB Partition
  General Purpose Partition 1
  General Purpose Partition 2
  General Purpose Partition 3
  General Purpose Partition 4
  User Data Area

These are referenced by fields in the PARTITION_CONFIG register
(Extended CSD Register 179) which is defined as:
bit 7: reserved
bit 6: BOOT_ACK
  0x0: No boot acknowledge sent (default
  0x1: Boot acknowledge sent during boot operation Bit
bit 5:3: BOOT_PARTITION_ENABLE
  0x0: Device not boot enabled (default)
  0x1: Boot Area partition 1 enabled for boot
  0x2: Boot Area partition 2 enabled for boot
  0x3-0x6: Reserved
  0x7: User area enabled for boot
bit 2:0 PARTITION_ACCESS
  0x0: No access to boot partition (default)
  0x1: Boot Area partition 1
  0x2: Boot Area partition 2
  0x3: Replay Protected Memory Block (RPMB)
  0x4: Access to General Purpose partition 1
  0x5: Access to General Purpose partition 2
  0x6: Access to General Purpose partition 3
  0x7: Access to General Purpose partition 4

Note that setting PARTITION_ACCESS to 0x0 results in selecting the User
Data Area partition.

You can see above that the two fields BOOT_PARTITION_ENABLE and
PARTITION_ACCESS do not use the same enumerated values.

U-Boot uses a set of macros to access fields of the PARTITION_CONFIG
register:

There are various places in U-Boot where the BOOT_PARTITION_ENABLE field
is accessed via EXT_CSD_EXTRACT_PARTITION_ACCESS and converted to a
hardware partition consistent with the definition of the
PARTITION_ACCESS field which is also the value used to specify the
hardware partition of the various mmc_switch incarnations.

To add some sanity to the distinction between BOOT_PARTITION_ENABLE
(used to specify the active device on power-cycle) and PARTITION_ACCESS
(used to switch between hardware partitions) create two enumerated types
and use them wherever struct mmc * part_config is used or the above
macros are used.

This represents no code changes.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
3 months agoMerge patch series "Make LMB memory map global and persistent"
Tom Rini [Tue, 3 Sep 2024 20:09:30 +0000 (14:09 -0600)]
Merge patch series "Make LMB memory map global and persistent"

Sughosh Ganu <sughosh.ganu@linaro.org> says:

This is a follow-up from an earlier RFC series [1] for making the LMB
and EFI memory allocations work together. This is a non-rfc version
with only the LMB part of the patches, for making the LMB memory map
global and persistent.

This is part one of a set of patches which aim to have the LMB and EFI
memory allocations work together. This requires making the LMB memory
map global and persistent, instead of having local, caller specific
maps. This is being done keeping in mind the usage of LMB memory by
platforms where the same memory region can be used to load multiple
different images. What is not allowed is to overwrite memory that has
been allocated by the other module, currently the EFI memory
module. This is being achieved by introducing a new flag,
LMB_NOOVERWRITE, which represents memory which cannot be re-requested
once allocated.

The data structures (alloced lists) required for maintaining the LMB
map are initialised during board init. The LMB module is enabled by
default for the main U-Boot image, while it needs to be enabled for
SPL. This version also uses a stack implementation, as suggested by
Simon Glass to temporarily store the lmb structure instance which is
used during normal operation when running lmb tests. This does away
with the need to run the lmb tests separately.

The tests have been tweaked where needed because of these changes.

The second part of the patches, to be sent subsequently, would work on
having the EFI allocations work with the LMB API's.

[1] - https://lore.kernel.org/u-boot/20240704073544.670249-1-sughosh.ganu@linaro.org/T/#t

Notes:

1) These patches are on next, as the alist patches have been
   applied to that branch.
2) I have tested the boot on the ST DK2 board, but it would be good to
   get a T-b/R-b from the ST maintainers.
3) It will be good to test these changes on a PowerPC platform
   (ideally an 85xx, as I do not have one).

3 months agolmb: add logic to print lmb flag strings
Sughosh Ganu [Mon, 26 Aug 2024 11:59:40 +0000 (17:29 +0530)]
lmb: add logic to print lmb flag strings

Instead of printing the LMB flags as numerical values, print them as
strings. This makes it easier to understand what flags are associated
with the lmb region. Also make corresponding changes to the bdinfo
command's test code.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agostm32mp: compute ram_top based on the optee base address
Sughosh Ganu [Mon, 26 Aug 2024 11:59:39 +0000 (17:29 +0530)]
stm32mp: compute ram_top based on the optee base address

The value of ram_top address currently gets computed in an indirect
manner. The boot_fdt_add_mem_rsv_regions() function gets called first
to reserve the memory region occupied by OP-TEE in the LMB memory
map. This is followed by a call to the lmb_alloc() API, which returns
an address which is below the OP-TEE base address. This address is the
value of ram_top returned by the board_get_usable_ram_top() function.

This has now changed, as the LMB memory map, which is no longer local,
gets set up after relocation. Get the OP-TEE base address by reading
the device tree, and set the ram_top from this value.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
3 months agostm32mp: allow calling optee_get_reserved_memory() from U-Boot
Sughosh Ganu [Mon, 26 Aug 2024 11:59:38 +0000 (17:29 +0530)]
stm32mp: allow calling optee_get_reserved_memory() from U-Boot

The optee_get_reserved_memory() function returns the OP-TEE base
address and size. The function gets these values from the
FDT. Currently, this function is defined only to be called in the SPL
phase. Move this function to a place where it can be invoked from the
main U-Boot phase, where it will be used to compute the ram_top
address.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
3 months agozynq: lmb: do not add to lmb map before relocation
Sughosh Ganu [Mon, 26 Aug 2024 11:59:37 +0000 (17:29 +0530)]
zynq: lmb: do not add to lmb map before relocation

The LMB memory is typically not needed very early in the platform's
boot. Do not add memory to the LMB map before relocation. Reservation
of common areas and adding of memory is done after relocation.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
3 months agosandbox: iommu: remove lmb allocation in the driver
Sughosh Ganu [Mon, 26 Aug 2024 11:59:36 +0000 (17:29 +0530)]
sandbox: iommu: remove lmb allocation in the driver

The sandbox iommu driver uses the LMB module to allocate a particular
range of memory for the device virtual address(DVA). This used to work
earlier since the LMB memory map was caller specific and not
global. But with the change to make the LMB allocations global and
persistent, adding this memory range has other side effects. On the
other hand, the sandbox iommu test expects to see this particular
value of the DVA. Use the DVA address directly, instead of mapping it
in the LMB memory map, and then have it allocated.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agosandbox: spl: enable lmb config for SPL
Sughosh Ganu [Mon, 26 Aug 2024 11:59:35 +0000 (17:29 +0530)]
sandbox: spl: enable lmb config for SPL

Enable the LMB config in SPL. This helps in testing the LMB code in
SPL on sandbox.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agospl: sandbox: initialise the ram banksize in spl
Sughosh Ganu [Mon, 26 Aug 2024 11:59:34 +0000 (17:29 +0530)]
spl: sandbox: initialise the ram banksize in spl

Initialise the ram bank information for sandbox in SPL. The ram bank
information gets initialised as part of the SPL initialisation
sequence in board_init_r(), which is then used for adding available
memory to the LMB memory map.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agospl: call spl_board_init() at the end of the spl init sequence
Sughosh Ganu [Mon, 26 Aug 2024 11:59:33 +0000 (17:29 +0530)]
spl: call spl_board_init() at the end of the spl init sequence

The spl_board_init() function on sandbox invokes the unit
tests. Invoking the tests should be done once the rest of the system
has been initialised. Call the spl_board_init() function at the very
end, once the rest of the initilisation functions have been called,
including the setting up of the LMB memory map.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agosandbox: move the TCG event log to the start of ram memory
Sughosh Ganu [Mon, 26 Aug 2024 11:59:32 +0000 (17:29 +0530)]
sandbox: move the TCG event log to the start of ram memory

The TCG event log buffer is being set at the end of ram memory. This
region of memory is to be reserved as LMB_NOMAP memory in the LMB
memory map. The current location of this buffer overlaps with the
memory region reserved for the U-Boot image, which is at the top of
the usable memory. This worked earlier as the LMB memory map was not
global but caller specific, but fails now because of the overlap.

Move the TCG event log buffer to the start of the ram memory region
instead. Move the location of the early trace buffer and the load
buffer for U-Boot(spl boot) accordingly.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agolmb: remove the unused board_lmb_reserve() function
Sughosh Ganu [Mon, 26 Aug 2024 11:59:31 +0000 (17:29 +0530)]
lmb: remove the unused board_lmb_reserve() function

The board_lmb_reserve() function is not being used, and currently
there is only an empty weak function defined. Remove this unused
function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: do away with arch_lmb_reserve()
Sughosh Ganu [Mon, 26 Aug 2024 11:59:30 +0000 (17:29 +0530)]
lmb: do away with arch_lmb_reserve()

All of the current definitions of arch_lmb_reserve() are doing the
same thing -- reserve the region of memory occupied by U-Boot,
starting from the current stack address to the ram_top. Introduce a
function lmb_reserve_uboot_region() which does this, and do away with
the arch_lmb_reserve() function.

Instead of using the current value of stack pointer for starting the
reserved region, have a fixed value, considering the stack size config
value.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agoppc: lmb: move arch specific lmb reservations to arch_misc_init()
Sughosh Ganu [Mon, 26 Aug 2024 11:59:29 +0000 (17:29 +0530)]
ppc: lmb: move arch specific lmb reservations to arch_misc_init()

All the current function definitions of arch_lmb_reserve() are doing
the same thing -- reserve the U-Boot memory region. The powerpc(ppc)
architecture, in addition, is making some LMB reservations for the
bootm related image loading. Move these ppc specific reservations to
the arch_misc_init() function. This allows to move the U-Boot memory
region reservation to a different function, and remove
arch_lmb_reserve() in a subsequent commit.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agolmb: init: initialise the lmb data structures during board init
Sughosh Ganu [Mon, 26 Aug 2024 11:59:28 +0000 (17:29 +0530)]
lmb: init: initialise the lmb data structures during board init

The memory map maintained by the LMB module is now persistent and
global. This memory map is being maintained through the alloced list
structure which can be extended at runtime -- there is one list for
the available memory, and one for the used memory. Allocate and
initialise these lists during the board init.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: bootm: remove superfluous lmb stub functions
Sughosh Ganu [Mon, 26 Aug 2024 11:59:27 +0000 (17:29 +0530)]
lmb: bootm: remove superfluous lmb stub functions

Remove a couple of superfluous LMB stub functions, and instead put a
check for calling the lmb_reserve() function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: remove lmb_init_and_reserve_range() function
Sughosh Ganu [Mon, 26 Aug 2024 11:59:26 +0000 (17:29 +0530)]
lmb: remove lmb_init_and_reserve_range() function

With the move to make the LMB allocations persistent and the common
memory regions being reserved during board init, there is no need for
an explicit reservation of a memory range. Remove the
lmb_init_and_reserve_range() function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agolmb: remove the lmb_init_and_reserve() function
Sughosh Ganu [Mon, 26 Aug 2024 11:59:25 +0000 (17:29 +0530)]
lmb: remove the lmb_init_and_reserve() function

With the changes to make the LMB reservations persistent, the common
memory regions are being added during board init. Remove the
now superfluous lmb_init_and_reserve() function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: reserve common areas during board init
Sughosh Ganu [Mon, 26 Aug 2024 11:59:24 +0000 (17:29 +0530)]
lmb: reserve common areas during board init

The LMB module provides API's for allocating and reserving chunks of
memory which is then typically used for things like loading images for
booting. Reserve the portion of memory that is occupied by the U-Boot
image itself, and other parts of memory that might have been marked as
reserved in the board's DTB. When executing in SPL, reserve the
sections that get relocated to the ram memory, the stack and
the global data structure and also the bss.

Mark these regions of memory with the LMB_NOOVERWRITE flag to indicate
that these regions cannot be re-requested or overwritten.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agolmb: introduce a function to add memory to the lmb memory map
Sughosh Ganu [Mon, 26 Aug 2024 11:59:23 +0000 (17:29 +0530)]
lmb: introduce a function to add memory to the lmb memory map

Introduce a function lmb_add_memory() to add available memory to the
LMB memory map. Call this function during board init once the LMB data
structures have been initialised.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agolmb: allow lmb module to be used in SPL
Sughosh Ganu [Mon, 26 Aug 2024 11:59:22 +0000 (17:29 +0530)]
lmb: allow lmb module to be used in SPL

With the introduction of separate config symbols for the SPL phase of
U-Boot, the condition checks need to be tweaked so that platforms that
enable the LMB module in SPL are also able to call the LMB API's. Use
the appropriate condition checks to achieve this.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: config: add lmb config symbols for SPL
Sughosh Ganu [Mon, 26 Aug 2024 11:59:21 +0000 (17:29 +0530)]
lmb: config: add lmb config symbols for SPL

Add separate config symbols for enabling the LMB module for the SPL
phase. The LMB module implementation now relies on alloced list data
structure which requires heap area to be present. Add specific config
symbol for the SPL phase of U-Boot so that this can be enabled on
platforms which support a heap in SPL.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: remove config symbols used for lmb region count
Sughosh Ganu [Mon, 26 Aug 2024 11:59:20 +0000 (17:29 +0530)]
lmb: remove config symbols used for lmb region count

The LMB memory maps are now being maintained through a couple of
alloced lists, one for the available(added) memory, and one for the
used memory. These lists are not static arrays but can be extended at
runtime. Remove the config symbols which were being used to define the
size of these lists with the earlier implementation of static arrays.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: allow for resizing lmb regions
Sughosh Ganu [Mon, 26 Aug 2024 11:59:19 +0000 (17:29 +0530)]
lmb: allow for resizing lmb regions

Allow for resizing of LMB regions if the region attributes match. The
current code returns a failure status on detecting an overlapping
address. This worked up until now since the LMB calls were not
persistent and global -- the LMB memory map was specific and private
to a given caller of the LMB API's.

With the change in the LMB code to make the LMB reservations
persistent, there needs to be a check on whether the memory region can
be resized, and then do it if so. To distinguish between memory that
cannot be resized, add a new flag, LMB_NOOVERWRITE. Reserving a region
of memory with this attribute would indicate that the region cannot be
resized.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
3 months agolmb: make LMB memory map persistent and global
Sughosh Ganu [Mon, 26 Aug 2024 11:59:18 +0000 (17:29 +0530)]
lmb: make LMB memory map persistent and global

The current LMB API's for allocating and reserving memory use a
per-caller based memory view. Memory allocated by a caller can then be
overwritten by another caller. Make these allocations and reservations
persistent using the alloced list data structure.

Two alloced lists are declared -- one for the available(free) memory,
and one for the used memory. Once full, the list can then be extended
at runtime.

[sjg: Use a stack to store pointer of lmb struct when running lmb tests]

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
[sjg: Optimise the logic to add a region in lmb_add_region_flags()]

3 months agolmb: use the BIT macro for lmb flags
Sughosh Ganu [Mon, 26 Aug 2024 11:59:17 +0000 (17:29 +0530)]
lmb: use the BIT macro for lmb flags

Use the BIT macro for assigning values to the LMB flags instead of
assigning random values to them.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 months agolmb: staticize __lmb_alloc_base()
Sughosh Ganu [Mon, 26 Aug 2024 11:59:16 +0000 (17:29 +0530)]
lmb: staticize __lmb_alloc_base()

The __lmb_alloc_base() function is only called from within the lmb
module. Moreover, the lmb_alloc() and lmb_alloc_base() API's are good
enough for the allocation API calls. Make the __lmb_alloc_base()
function static.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agolmb: remove the unused lmb_is_reserved() function
Sughosh Ganu [Mon, 26 Aug 2024 11:59:15 +0000 (17:29 +0530)]
lmb: remove the unused lmb_is_reserved() function

The lmb_is_reserved() API is not used. There is another API,
lmb_is_reserved_flags() which can be used to check if a particular
memory region is reserved. Remove the unused API.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agoalist: add a helper to check if the list is full
Sughosh Ganu [Mon, 26 Aug 2024 11:59:14 +0000 (17:29 +0530)]
alist: add a helper to check if the list is full

Add a helper function to check if the alist is full. This can then be
used to extend the alist.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agoMerge patch series "net: dwc_eth_qos: Add glue driver for Intel MAC"
Tom Rini [Tue, 3 Sep 2024 15:12:06 +0000 (09:12 -0600)]
Merge patch series "net: dwc_eth_qos: Add glue driver for Intel MAC"

Philip Oberfichtner <pro@denx.de> says:

This patch series implements the dwc_eth_qos glue driver for Intel SOCs.
Before doing that, a few general adaptions to the dwc_eth_qos.c main
driver are required. Most notably, the preparation for PCI based driver
instances, which do not necessarily use a device tree.

3 months agonet: dwc_eth_qos: Add glue driver for Intel MAC
Philip Oberfichtner [Fri, 2 Aug 2024 09:25:39 +0000 (11:25 +0200)]
net: dwc_eth_qos: Add glue driver for Intel MAC

Add dwc_eth_qos glue driver for the Intel Elkhart-Lake SOC.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
3 months agonet: dwc_eth_qos: Implement bind() for PCI devices
Philip Oberfichtner [Fri, 2 Aug 2024 09:25:38 +0000 (11:25 +0200)]
net: dwc_eth_qos: Implement bind() for PCI devices

PCI devices do not necessarily use a device tree. Implement a bind()
function to assign unique device names in that case.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
3 months agonet: dwc_eth_qos: Adapt probe() for PCI devices
Philip Oberfichtner [Fri, 2 Aug 2024 09:25:37 +0000 (11:25 +0200)]
net: dwc_eth_qos: Adapt probe() for PCI devices

PCI devices do not necessarily use a device tree. In that case, the
driver currently fails to find eqos->config and eqos->regs.

This commit factors out the respective functionality. Device tree usage
remains default, but board specific implementations will be possible as
well.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
3 months agonet: dwc_eth_qos: Fix header to be self-contained
Philip Oberfichtner [Fri, 2 Aug 2024 09:25:36 +0000 (11:25 +0200)]
net: dwc_eth_qos: Fix header to be self-contained

Before this commit, usage of this header relied on a specific include
order. Fix it by including all dependencies.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
3 months agox86: provide mb() macro
Philip Oberfichtner [Fri, 2 Aug 2024 09:25:35 +0000 (11:25 +0200)]
x86: provide mb() macro

Implement a x86 memory barrier mb(). Furthermore, remove the previously
used mfence() function, which does the same thing.

The mb() macro is now equivalent to Linux (v6.9):
linux/arch/x86/include/asm/barrier.h

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agoMerge tag 'u-boot-imx-next-20240902' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 2 Sep 2024 22:03:02 +0000 (16:03 -0600)]
Merge tag 'u-boot-imx-next-20240902' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22211

- Enable SPI NOR flash support and MTD partitions for phycore_imx8mp.
- Convert mx6slevk to OF_UPSTREAM and watchdog DM.
- Cleanup some mx5/mx6 USB options.
- Make PLL settings configurable at board level.
- Set CONFIG_SPL_LOAD_FIT_ADDRESS for verdin-imx8m/p.
- Make the mxc-gpio reading state of GPIO pins in output mode to be
  consistent with the Linux kernel.
- Add HUK derivation support for ELE AHAB.

3 months agoMerge tag 'u-boot-amlogic-next-20240902' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 2 Sep 2024 22:02:37 +0000 (16:02 -0600)]
Merge tag 'u-boot-amlogic-next-20240902' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next

- meson_nand: R/W support for pages used by boot ROM

3 months agoMerge tag 'v2024.10-rc4' into next
Tom Rini [Mon, 2 Sep 2024 20:13:57 +0000 (14:13 -0600)]
Merge tag 'v2024.10-rc4' into next

Prepare v2024.10-rc4

3 months agoPrepare v2024.10-rc4
Tom Rini [Mon, 2 Sep 2024 20:07:53 +0000 (14:07 -0600)]
Prepare v2024.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
3 months agoARM: imx: Wrap i.MX config options in MACH_IMX
Marek Vasut [Sun, 1 Sep 2024 00:38:00 +0000 (02:38 +0200)]
ARM: imx: Wrap i.MX config options in MACH_IMX

Wrap all the i.MX specific options in MACH_IMX, otherwise they keep
showing up in other SoC vendor configurations. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agoMerge tag 'dm-pull-1sep24' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Sun, 1 Sep 2024 21:56:22 +0000 (15:56 -0600)]
Merge tag 'dm-pull-1sep24' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

Minor fixes for qconfig and patman

3 months agoqconfig: Fix an incorrect format-string with negative value
Simon Glass [Wed, 21 Aug 2024 23:52:24 +0000 (17:52 -0600)]
qconfig: Fix an incorrect format-string with negative value

This is not allowed, so use ljust() instead. This fixes the
'qconfig -i -I help' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 1bd43060b3e ("moveconfig: Use f strings where possible")
3 months agopatman: Resolve python string vs. regex escaping syntax
Brian Norris [Fri, 26 Jul 2024 19:02:33 +0000 (12:02 -0700)]
patman: Resolve python string vs. regex escaping syntax

Python strings have their own notion of backslash-escaping, and that can
conflict with the intentions for strings passed to the 're' module. In
particular, I get warnings like this:

tools/patman/../patman/commit.py:9: SyntaxWarning: invalid escape sequence '\s'
  re_subject_tag = re.compile('([^:\s]*):\s*(.*)')

We should use a raw string (r'...') so that all escaping is passed into
the regex module, not interpreted within the string itself.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agoARM: imx: Make PLL settings configurable at board level
Marek Vasut [Tue, 27 Aug 2024 20:04:27 +0000 (22:04 +0200)]
ARM: imx: Make PLL settings configurable at board level

Staticize intpll_configure(). Add weak board_imx_intpll_override()
function which can be defined at board level to override specific
PLL frequency settings early during boot. This can be used to for
example force faster CPU core clock frequency if the hardware can
handle it.

Example of increasing CPU core clock to 1600 MHz on i.MX8M Plus:
```
int board_imx_intpll_override(enum pll_clocks pll, ulong *freq)
{
       if (pll == ANATOP_ARM_PLL)
               *freq = MHZ(1600);
       return 0;
}
```

Signed-off-by: Marek Vasut <marex@denx.de>
3 months agoimx: Remove CFG_MXC_USB_PORTSC
Fabio Estevam [Sat, 31 Aug 2024 01:43:40 +0000 (22:43 -0300)]
imx: Remove CFG_MXC_USB_PORTSC

The definition of CFG_MXC_USB_PORTSC as (PORT_PTS_UTMI | PORT_PTS_PTW)
can be removed from mx5/mx6/mx7/mx8m board config files as it is the
default in drivers/usb/host/ehci-mx5.c and drivers/usb/host/ehci-mx6.c.

Suggested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
3 months agomx5: Remove CFG_MXC_USB_PORT
Fabio Estevam [Wed, 28 Aug 2024 13:25:28 +0000 (10:25 -0300)]
mx5: Remove CFG_MXC_USB_PORT

CFG_MXC_USB_PORT is not used anywhere, so remove this unused symbol.

Suggested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
3 months agousb: ehci-mx5: Add a default for CFG_MXC_USB_PORTSC
Fabio Estevam [Wed, 28 Aug 2024 13:25:27 +0000 (10:25 -0300)]
usb: ehci-mx5: Add a default for CFG_MXC_USB_PORTSC

Just like drivers/usb/host/ehci-mx6.c, add a default for
drivers/usb/host/ehci-mx5.c.

The motivation for doing this is to remove CFG_MXC_USB_PORTSC
from board config files.

All the mx5 boards, with the exeption of mx51evk, define
CFG_MXC_USB_PORTSC as:

 #define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)

So move this definition as a default into ehci-mx5.c.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
3 months agoimx: Remove CFG_MXC_USB_FLAGS
Fabio Estevam [Sat, 31 Aug 2024 01:38:23 +0000 (22:38 -0300)]
imx: Remove CFG_MXC_USB_FLAGS

CFG_MXC_USB_FLAGS is only used for drivers/usb/host/ehci-mx5.c, so it
can be removed from all the imx6/imx7/imx8m board config files.

mx51evk.h is the only place CFG_MXC_USB_FLAGS is not set to 0.

Suggested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
3 months agoconfigs: verdin-imx8m[mp]: set CONFIG_SPL_LOAD_FIT_ADDRESS
Rogerio Guerra Borin [Thu, 29 Aug 2024 11:23:57 +0000 (08:23 -0300)]
configs: verdin-imx8m[mp]: set CONFIG_SPL_LOAD_FIT_ADDRESS

Set the CONFIG_SPL_LOAD_FIT_ADDRESS for both verdin-imx8mm and
verdin-imx8mp configurations to specify the load address for FIT images
loaded by the SPL.

As per lastest instructions from NXP, the generation of a HABv4 CSF
(Command Sequence File) requires the U-Boot FIT image (u-boot.itb) load
address to be set to a fixed value when binman is used. The address is
defined by CONFIG_SPL_LOAD_FIT_ADDRESS.

Here we set CONFIG_SPL_LOAD_FIT_ADDRESS to an address 64MB past the
start of the DDR memory leaving plenty of room for the various DDR-
residing artifacts to be moved to their usual load addresses which are
close to the start of the DDR.

Signed-off-by: Rogerio Guerra Borin <rogerio.borin@toradex.com>
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
3 months agogpio: mxc_gpio: fix reading state of GPIO pins in output mode
Tomas Paukrt [Wed, 28 Aug 2024 13:09:48 +0000 (15:09 +0200)]
gpio: mxc_gpio: fix reading state of GPIO pins in output mode

The PSR register works correctly for GPIO pins in input mode,
but always returns 0 for GPIO pins in output mode unless the SION
bit is set.

The DR register should be used for GPIO pins in output mode
to allow correct getting of previously set output value.

Please note that the Linux gpio-mxc driver and the NXP U-Boot mxc_gpio
driver already use the DR register for all GPIO pins in output mode:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=442b2494b17d1a4f0a14721580271eb23ebffd42
https://github.com/nxp-imx/uboot-imx/commit/4afc3f90943c6b117f79b66d2cd04e64f437b0c2

Signed-off-by: Tomas Paukrt <tomaspaukrt@email.cz>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
3 months agoMerge patch series "Add support for Ethernet Boot on SK-AM62"
Tom Rini [Fri, 30 Aug 2024 20:02:03 +0000 (14:02 -0600)]
Merge patch series "Add support for Ethernet Boot on SK-AM62"

Chintan Vankar <c-vankar@ti.com> says:

This series enables Ethernet Boot on SK-AM62 device.

This series is based on commit 'f4f845b85926' of origin/next branch of
U-Boot.

Logs for Ethernet Boot for AM625-SK:
https://gist.github.com/chintanv133/464782796a9a60b9f5a49e674c5fc31a

3 months agoarm64: dts: ti: k3-am62x-sk-common: Add bootph-all property in phy_gmii_sel node
Chintan Vankar [Mon, 26 Aug 2024 10:25:15 +0000 (15:55 +0530)]
arm64: dts: ti: k3-am62x-sk-common: Add bootph-all property in phy_gmii_sel node

Add missing bootph-all property for CPSW MAC's PHY node
phy_gmii_sel.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Link: https://lore.kernel.org/r/20240430085048.3143665-1-c-vankar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[ upstream commit: ba50141137fae205a731005e70687f4a52289050 ]

(cherry picked from commit 2bdd1743a9f6515efe7c3648a25d63b4a9ce4a10)

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
3 months agoarm: dts: k3-am625-r5-sk: Enable DM services for main_pktdma
Siddharth Vadapalli [Mon, 26 Aug 2024 10:25:14 +0000 (15:55 +0530)]
arm: dts: k3-am625-r5-sk: Enable DM services for main_pktdma

Enable DM services for main_pktdma during R5 SPL stage.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agoconfigs: am62: Enable configs required for Ethboot
Kishon Vijay Abraham I [Mon, 26 Aug 2024 10:25:13 +0000 (15:55 +0530)]
configs: am62: Enable configs required for Ethboot

Enable config options needed to support Ethernet boot on AM62x SK.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agoconfigs: am62: Add configs for enabling ETHBOOT in R5SPL
Kishon Vijay Abraham I [Mon, 26 Aug 2024 10:25:12 +0000 (15:55 +0530)]
configs: am62: Add configs for enabling ETHBOOT in R5SPL

Add configs for enabling ETHBOOT in R5SPL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agoarm: mach-k3: am62x: am625_init: Probe AM65 CPSW NUSS
Kishon Vijay Abraham I [Mon, 26 Aug 2024 10:25:11 +0000 (15:55 +0530)]
arm: mach-k3: am62x: am625_init: Probe AM65 CPSW NUSS

In order to support Ethernet boot on AM62x, probe AM65 CPSW NUSS
driver in board_init_f().

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agodma: ti: k3-udma: Add support for native configuration of chan/flow
Kishon Vijay Abraham I [Mon, 26 Aug 2024 10:25:10 +0000 (15:55 +0530)]
dma: ti: k3-udma: Add support for native configuration of chan/flow

In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers.
Existing UDMA driver performed the above mentioned configuration
for UDMA. Add similar configuration for PKTDMA here.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agosoc: ti: k3-navss-ringacc: Fix reconfiguration of qmode API
Chintan Vankar [Mon, 26 Aug 2024 10:25:09 +0000 (15:55 +0530)]
soc: ti: k3-navss-ringacc: Fix reconfiguration of qmode API

Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to
requested value and should not update other fields in ring configuration
register.

Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
3 months agosoc: ti: k3-navss-ringacc: Fix reset ring API
Vignesh Raghavendra [Mon, 26 Aug 2024 10:25:08 +0000 (15:55 +0530)]
soc: ti: k3-navss-ringacc: Fix reset ring API

Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
requested size and not to 0. Fix this.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
3 months agosoc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers
Kishon Vijay Abraham I [Mon, 26 Aug 2024 10:25:07 +0000 (15:55 +0530)]
soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers

Initialize base address of ring config registers required to natively
setup ring cfg registers in the absence of Device Manager (DM) services
at R5 SPL stage. Since register property is defined as "ring" for PKTDMA
and "cfg" for UDMA, configure base address of ring configuration register
accordingly.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agofirmware: ti_sci: Add No-OP for "RX_FL_CFG"
Kishon Vijay Abraham I [Mon, 26 Aug 2024 10:25:06 +0000 (15:55 +0530)]
firmware: ti_sci: Add No-OP for "RX_FL_CFG"

RX_FL_CFG message should not be forwarded to TIFS and should be
handled within R5 SPL (when DM services are not available). Add
a no-op function to not handle RX_FL_CFG messages.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agocommon: spl: spl: Init DRAM size in R5/A53 SPL
Chintan Vankar [Mon, 26 Aug 2024 10:25:05 +0000 (15:55 +0530)]
common: spl: spl: Init DRAM size in R5/A53 SPL

Initialize DRAM size in SPL stage since networking requires DDR
to be initialized.

Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
3 months agolib: crypto: fix ASYMMETRIC_KEY_TYPE dependency
Tomas Paukrt [Tue, 27 Aug 2024 17:38:09 +0000 (19:38 +0200)]
lib: crypto: fix ASYMMETRIC_KEY_TYPE dependency

Fix the dependency to avoid a warning if RSA_VERIFY_WITH_PKEY is enabled.

Fixes: b7463f198da6 ("Make ASYMMETRIC_KEY_TYPE depend on FIT_SIGNATURE")
Signed-off-by: Tomas Paukrt <tomaspaukrt@email.cz>
3 months agolist: use list_count_nodes() to count list entries
Sughosh Ganu [Wed, 28 Aug 2024 16:54:22 +0000 (22:24 +0530)]
list: use list_count_nodes() to count list entries

Use the API function list_count_nodes() to count the number of list
entries.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agomx6slevk: Convert to OF_UPSTREAM
Fabio Estevam [Mon, 26 Aug 2024 18:04:54 +0000 (15:04 -0300)]
mx6slevk: Convert to OF_UPSTREAM

Instead of using the local imx6sl-evk, imx6sl-pinfunc.h and
imx6sl.dtsi devicetree copies from U-Boot, convert the imx6sl-evk board
to OF_UPSTREAM so that the upstream kernel devicetree can be used instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
3 months agomx6slevk: Keep a single defconfig
Fabio Estevam [Mon, 26 Aug 2024 18:04:53 +0000 (15:04 -0300)]
mx6slevk: Keep a single defconfig

Remove mx6slevk_spinor_defconfig and mx6slevk_spl_defconfig in
favor of having a single mx6slevk_defconfig to help reducing
the maintenance effort.

Signed-off-by: Fabio Estevam <festevam@denx.de>
3 months agomx6slevk: Fix the boot device number
Fabio Estevam [Mon, 26 Aug 2024 18:04:52 +0000 (15:04 -0300)]
mx6slevk: Fix the boot device number

The SD card is registered as mmc device 0.

Fix it accordingly so that the board can boot to Linux
from the SD card.

Signed-off-by: Fabio Estevam <festevam@denx.de>
3 months agomx6slevk: Convert to watchdog driver model
Fabio Estevam [Mon, 26 Aug 2024 18:04:51 +0000 (15:04 -0300)]
mx6slevk: Convert to watchdog driver model

Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.

Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.

Signed-off-by: Fabio Estevam <festevam@denx.de>
3 months agoboard: phytec: phycore_imx8mp: Add mtd spi partitions
Benjamin Hahn [Mon, 26 Aug 2024 16:49:06 +0000 (18:49 +0200)]
board: phytec: phycore_imx8mp: Add mtd spi partitions

Depending on if a SPI-NOR flash is populated add the mtd partition
table to the device tree. For this we have to also probe the
flash before booting.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
3 months agoconfigs: phycore-imx8mp_defconfig: Enable SPI NOR flash support
Benjamin Hahn [Mon, 26 Aug 2024 16:49:05 +0000 (18:49 +0200)]
configs: phycore-imx8mp_defconfig: Enable SPI NOR flash support

Enable SPI NOR flash support in U-Boot.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
3 months agoimx: ele_ahab: Add HUK derivation support
Mathieu Othacehe [Mon, 26 Aug 2024 10:07:07 +0000 (12:07 +0200)]
imx: ele_ahab: Add HUK derivation support

Add a new ahab_derive command that derives the hardware unique key (HUK)
into a 16 or 32 bytes key and stores it at the given address.

Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Ye Li <ye.li@nxp.com>
3 months agoMerge tag 'u-boot-imx-master-20240829' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Thu, 29 Aug 2024 14:15:37 +0000 (08:15 -0600)]
Merge tag 'u-boot-imx-master-20240829' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22162

- Fix an issue with "tools/buildman/buildman imx8ulp_evk"
  failing every other time.

3 months agomach-imx: do not use if_changed more than once per target
Jerome Forissier [Wed, 28 Aug 2024 15:36:37 +0000 (17:36 +0200)]
mach-imx: do not use if_changed more than once per target

doc/develop/makefiles.rst has the following note:

  if_changed should not be used more than once per target.
  It stores the executed command in a corresponding .cmd
  file and multiple calls would result in overwrites and
  unwanted results when the target is up to date and only the
  tests on changed commands trigger execution of commands.

The mach-imx Makefile does not follow this recommandation, so fix it
by implementing a single command that performs both the cpp_cfg
and imx9_check actions.

This change fixes an issue with "tools/buildman/buildman imx8ulp_evk"
failing every other time [1].

[1] https://lists.denx.de/pipermail/u-boot/2024-August/563192.html

Fixes: f637dfe8c468 ("mach-imx: Add i.MX93 binman support.")
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
3 months agobootstage: Fix unstash of records from SPL
Jonas Karlman [Sat, 3 Aug 2024 12:41:44 +0000 (12:41 +0000)]
bootstage: Fix unstash of records from SPL

The commit b81e31a1e6c5 ("bootstash: Do not provide a default address
for all") changed a bootstage unstash call to bootstage stash, this
has resulted in bootstage records stashed in SPL no longer get unstaged
in U-Boot proper. Fix this by changing back to a unstage call.

Fixes: b81e31a1e6c5 ("bootstash: Do not provide a default address for all")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agobootstage: Fix unstash of records from SPL
Jonas Karlman [Sat, 3 Aug 2024 12:41:44 +0000 (12:41 +0000)]
bootstage: Fix unstash of records from SPL

The commit b81e31a1e6c5 ("bootstash: Do not provide a default address
for all") changed a bootstage unstash call to bootstage stash, this
has resulted in bootstage records stashed in SPL no longer get unstaged
in U-Boot proper. Fix this by changing back to a unstage call.

Fixes: b81e31a1e6c5 ("bootstash: Do not provide a default address for all")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agomtd: rawnand: meson: read/write access for boot ROM pages
Arseniy Krasnov [Mon, 26 Aug 2024 13:17:10 +0000 (16:17 +0300)]
mtd: rawnand: meson: read/write access for boot ROM pages

Boot ROM on Meson needs some pages to be read/written in a special mode:
384 byte ECC mode (so called "short" by Amlogic) and with scrambling
enabled. Such pages are located on the chip in the following way (for
example):

[ p0 ][ p1 ][ p2 ][ p3 ][ p4 ][ p5 ][ p6 ][ p7 ] ... [ pN ]
  ^           ^           ^           ^

pX is page number "X". "^" means "special" page used by boot ROM - e.g.
every 2nd page in the range of [0, 7]. Step (2 here) and last page in
range is read from the device tree.

Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20240826131710.29746-4-avkrasnov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
3 months agomtd: rawnand: meson: refactor use of 'meson_nfc_cmd_access()'
Arseniy Krasnov [Mon, 26 Aug 2024 13:17:09 +0000 (16:17 +0300)]
mtd: rawnand: meson: refactor use of 'meson_nfc_cmd_access()'

Move call 'meson_nfc_cmd_seed()' and check for 'NAND_NEED_SCRAMBLING'
to 'meson_nfc_cmd_access()', thus removing code duplication.

Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20240826131710.29746-3-avkrasnov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
3 months agomtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flag
Arseniy Krasnov [Mon, 26 Aug 2024 13:17:08 +0000 (16:17 +0300)]
mtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flag

Based on Linux kernel:
commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a boot device")

Allow to define a NAND chip as a boot device. This can be helpful
for the selection of the ECC algorithm and strength in case the boot
ROM supports only a subset of controller provided options.

Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/r/20240826131710.29746-2-avkrasnov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
3 months agommc: fix signed vs unsigned compare in read check in _spl_load()
Franco Venturi [Wed, 31 Jul 2024 13:09:00 +0000 (09:09 -0400)]
mmc: fix signed vs unsigned compare in read check in _spl_load()

Fix signed vs unsigned compare in read check in _spl_load()

Issue: when info->read() returns a negative value because of an error,
       the comparison of 'read' (signed) with 'sizeof(*header)'
       (unsigned silently converts the negative value into a very
       large unsigned value and the check on the error condition
       always return false, i.e. the error is not detected
Symptoms: if spl_load_image_fat() is unable to find the file 'uImage',
          the SPL phase of the boot process just hangs after displaying
          the following line:
          Trying to boot from MMC1
Fix: cast 'sizeof(*header)' to int so the compare is now between
     signed types
Reference: https://stackoverflow.com/questions/17293749/sizeof-operator-in-if-statement

Signed-off-by: Franco Venturi <fventuri@comcast.net>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
3 months agogpio: Add G7 Aspeed gpio controller driver
Billy Tsai [Tue, 20 Aug 2024 07:27:36 +0000 (15:27 +0800)]
gpio: Add G7 Aspeed gpio controller driver

In the 7th generation of the SoC from Aspeed, the control logic of the
GPIO controller has been updated to support per-pin control. Each pin now
has its own 32-bit register, allowing for individual control of the pin’s
value, direction, interrupt type, and other settings.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
3 months agotools/scripts/Kconfig: Update references from kconfig-language.txt to rst
Hiago De Franco [Mon, 19 Aug 2024 16:24:49 +0000 (13:24 -0300)]
tools/scripts/Kconfig: Update references from kconfig-language.txt to rst

The Linux kernel documentation has transitioned from using
kconfig-language.txt to kconfig-language.rst. Therefore update all
occurrences of kconfig-language.txt.

Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
3 months agodm: core: Make SPL_DM_SEQ_ALIAS select SPL_STRTO
Gaskell, Oliver [Mon, 19 Aug 2024 09:43:52 +0000 (09:43 +0000)]
dm: core: Make SPL_DM_SEQ_ALIAS select SPL_STRTO

Enabling CONFIG_DM_SEQ_ALIAS enables code which relies on
`trailing_strtol()` - which is only linked in SPL when CONFIG_SPL_STRTO
is enabled.

CONFIG_SPL_STRTO is not enabled by default - to ensure this function is
available in SPL, CONFIG_SPL_DM_SEQ_ALIAS should select
CONFIG_SPL_STRTO.

Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agoarm: dts: nuvoton: add dts support for npcm845 yosemite4
Jim Liu [Mon, 19 Aug 2024 07:24:28 +0000 (15:24 +0800)]
arm: dts: nuvoton: add dts support for npcm845 yosemite4

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
3 months agolib: move phdr increment to for loop heading
Maxim Moskalets [Sat, 17 Aug 2024 11:02:22 +0000 (14:02 +0300)]
lib: move phdr increment to for loop heading

Shifting this pointer in the loop will be more logical when working
with the code later, because you can see at a glance what exactly
changes at each iteration. Moreover, the code remains equivalent
because this variable is not used after the loop.

Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agoMerge patch series "dm: core: Avoid multiple calls to fdt_parent_offset()"
Tom Rini [Tue, 27 Aug 2024 20:32:54 +0000 (14:32 -0600)]
Merge patch series "dm: core: Avoid multiple calls to fdt_parent_offset()"

Jonas Karlman <jonas@kwiboo.se> says:

Use of fdt_parent_offset() is very expensive as detailed by the function
documentation:

  NOTE: This function is expensive, as it must scan the device tree
  structure from the start to nodeoffset, *twice*.

This series remove multiple calls to fdt_parent_offset() or
ofnode_get_parent() when instead a single call can be made and the
returned value can be reused.

This series help reduce boot time by around:
- ~137ms on a Radxa ROCK Pi 4 (RK3399)
- ~33ms on a Radxa ZERO 3W (RK3566)

3 months agotimer: npcm: Change counter source
Jim Liu [Mon, 29 Jul 2024 09:04:06 +0000 (17:04 +0800)]
timer: npcm: Change counter source

The counter value read from TDR register may not be correct.
Read SECCNT and CNTR25M instead to get the correct timestamp.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
3 months agodm: core: regmap: Avoid multiple calls to ofnode_get_parent()
Jonas Karlman [Sun, 4 Aug 2024 15:05:51 +0000 (15:05 +0000)]
dm: core: regmap: Avoid multiple calls to ofnode_get_parent()

Until a live tree is used in U-Boot proper after relocation, use of
ofnode_get_parent() will trigger a call to the very expensive
fdt_parent_offset(), as detailed by the function documentation:

  NOTE: This function is expensive, as it must scan the device tree
  structure from the start to nodeoffset, *twice*.

Re-use the returned value from a single call instead of having to make
multiple calls for same node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agodm: core: ofnode: Avoid multiple calls to ofnode_get_parent()
Jonas Karlman [Sun, 4 Aug 2024 15:05:50 +0000 (15:05 +0000)]
dm: core: ofnode: Avoid multiple calls to ofnode_get_parent()

Until a live tree is used in U-Boot proper after relocation, use of
ofnode_get_parent() will trigger a call to the very expensive
fdt_parent_offset() as detailed by the function documentation:

  NOTE: This function is expensive, as it must scan the device tree
  structure from the start to nodeoffset, *twice*.

Re-use the returned value from a single call instead of having to make
multiple calls for same node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 months agodm: core: fdtaddr: Avoid multiple calls to fdt_parent_offset()
Jonas Karlman [Sun, 4 Aug 2024 15:05:49 +0000 (15:05 +0000)]
dm: core: fdtaddr: Avoid multiple calls to fdt_parent_offset()

Use of fdt_parent_offset() is very expensive as detailed by the function
documentation:

  NOTE: This function is expensive, as it must scan the device tree
  structure from the start to nodeoffset, *twice*.

Re-use the returned value from a single call instead of having to make
multiple calls for same nodeoffset.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>