]> git.dujemihanovic.xyz Git - u-boot.git/log
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12 months agoMerge branch '2023-12-19-assorted-platform-updates' into next
Tom Rini [Tue, 19 Dec 2023 15:07:56 +0000 (10:07 -0500)]
Merge branch '2023-12-19-assorted-platform-updates' into next

- Assorted platform updates for TI K3, vexpress64, mediatek and related
  cleanups to the DW GPIO driver and OPTEE

12 months agoarm: mach-k3: am625: Relax emmc boot condition
Michael Trimarchi [Fri, 8 Dec 2023 07:53:05 +0000 (08:53 +0100)]
arm: mach-k3: am625: Relax emmc boot condition

spl_mmc_emmc_boot_partition return a number different from 0
if the partition is a boot one. We can have the uboot img
for instance in a raw offset in emmc partition 0 so we would
like to continue to load the next stage. If the user want
to use EMMC as boot device allow him to use any part of the
emmc and not only boot partition

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
12 months agommc: mediatek: set b_max according CONFIG_SYS_MMC_MAX_BLK_COUNT
Julien Masson [Mon, 4 Dec 2023 13:41:45 +0000 (14:41 +0100)]
mmc: mediatek: set b_max according CONFIG_SYS_MMC_MAX_BLK_COUNT

The block count limit on MMC based devices should be set according to
CONFIG_SYS_MMC_MAX_BLK_COUNT instead of hardcoding value.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
12 months agogpio: dw: Drop unused headers
Maksim Kiselev [Wed, 29 Nov 2023 21:47:31 +0000 (00:47 +0300)]
gpio: dw: Drop unused headers

Drop headers which are not used or needed in this file.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
12 months agotee: optee: don't enumerate services if there ain't any
Etienne Carriere [Wed, 29 Nov 2023 12:37:53 +0000 (13:37 +0100)]
tee: optee: don't enumerate services if there ain't any

Change optee driver service enumeration to not enumerate (and
allocate a zero sized shared memory buffer) when OP-TEE
reports that there is no service to enumerate.

This change fixes an existing issue that occurs when the such zero
sized shared memory buffer allocated from malloc() has a physical
address of offset 0 of a physical 4kB page. In such case, OP-TEE
secure world refuses to register the zero-sized shared memory
area and makes U-Boot optee service enumeration to fail.

Fixes: 94ccfb78a4d6 ("drivers: tee: optee: discover OP-TEE services")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
12 months agotee: optee: don't fail on services enumeration failure
Etienne Carriere [Wed, 29 Nov 2023 12:37:52 +0000 (13:37 +0100)]
tee: optee: don't fail on services enumeration failure

Change optee probe function to only warn when service enumeration
sequence fails instead of reporting an optee driver probe failure.
Indeed U-Boot can still use OP-TEE even if some OP-TEE services are
not discovered.

Fixes: 94ccfb78a4d6 ("drivers: tee: optee: discover OP-TEE services")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
12 months agoremoteproc: k3-dsp: Avoid reloading of firmware
Udit Kumar [Sat, 25 Nov 2023 18:29:39 +0000 (23:59 +0530)]
remoteproc: k3-dsp: Avoid reloading of firmware

DSP core is going into abnormal state when load callback is called
after starting of DSP core.
Reload of firmware needs core to be stopped first, followed by
load.
So avoid loading of firmware, when core is started.

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
12 months agoarm: vexpress64: juno: Allow boot from VirtIO
Robert Catherall [Thu, 23 Nov 2023 18:22:58 +0000 (18:22 +0000)]
arm: vexpress64: juno: Allow boot from VirtIO

The AEM and Juno FVPs (Fixed Virtual Platforms) support a VirtIO
disc interface. Adding VIRTIO to the list of boot devices allows
these FastModel platforms to boot from 'disc' in the same way
the hardware counterpart can boot from SATA or USB.

This is a NOP if CONFIG_CMD_VIRTIO is not enabled, so no impact
on Juno hardware (which is built with vexpress_aemv8a_juno_defconfig)

Signed-off-by: Robert Catherall <robert.catherall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
12 months agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into...
Tom Rini [Mon, 18 Dec 2023 14:56:58 +0000 (09:56 -0500)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next

- VisionFive2: Enable CONFIG_SYSRESET
- StarFive: Modify starfive timer driver
- AMD/Xilinx: Add MicroBlaze V support
- Unmatched: Migrate to text environment

12 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi into...
Tom Rini [Mon, 18 Dec 2023 14:56:42 +0000 (09:56 -0500)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi into next

- spi_nor_read_sfdp_dma_unsafe (Vaishnav)
- w25q01/02 (Jim)

12 months agoMerge tag 'v2024.01-rc5' into next
Tom Rini [Mon, 18 Dec 2023 13:31:50 +0000 (08:31 -0500)]
Merge tag 'v2024.01-rc5' into next

Prepare v2024.01-rc5

12 months agoPrepare v2024.01-rc5
Tom Rini [Mon, 18 Dec 2023 12:49:45 +0000 (07:49 -0500)]
Prepare v2024.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
12 months agoriscv: sifive: unmatched: migrate to text environment
Yong-Xuan Wang [Tue, 5 Dec 2023 11:09:55 +0000 (11:09 +0000)]
riscv: sifive: unmatched: migrate to text environment

Migrate to the new environment format and drop most of the config.h.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
12 months agotimer: starfive: Add Starfive timer support
Kuan Lim Lee [Mon, 11 Dec 2023 02:22:10 +0000 (10:22 +0800)]
timer: starfive: Add Starfive timer support

Add timer driver in Starfive SoC. It is an timer that outside
of CPU core and inside Starfive SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Changes for v2:
- correct driver name, comment, variable
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
12 months agoriscv: Add support for AMD/Xilinx MicroBlaze V
Michal Simek [Mon, 6 Nov 2023 11:56:47 +0000 (12:56 +0100)]
riscv: Add support for AMD/Xilinx MicroBlaze V

MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
It is hardware compatible with classic MicroBlaze processor.

The patch contains initial wiring and configuration for initial HW design
with memory, cpu, interrupt controller, timers and uartlite console
(interrupt controller is listed but U-Boot is not using it).

Provided DT is just describing one configuration and should be taken only
as example.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
12 months agoconfigs: visionfive2: Enable CONFIG_SYSRESET config
Jaehoon Chung [Tue, 31 Oct 2023 08:24:39 +0000 (17:24 +0900)]
configs: visionfive2: Enable CONFIG_SYSRESET config

Enable CONFIG_SYSRESET config to do reset.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
12 months agoriscv: dts: jh7110: Add a gpio-restart node
Jaehoon Chung [Tue, 31 Oct 2023 08:24:38 +0000 (17:24 +0900)]
riscv: dts: jh7110: Add a gpio-restart node

Add gpio-restart node to do reset.

Before applied this patch, System Reset Extension doesn't appear with
sbi command.

OpenSBI 1.3
Machine:
  Vendor ID 489
  Architecture ID 8000000000000007
  Implementation ID 4210427
Extensions:
  sbi_set_timer
  sbi_console_putchar
...[snip]...
  IPI Extension
  RFENCE Extension
  Hart State Management Extension
  Performance Monitoring Unit Extension

After applied this patch, System Reset Extension is supported from SBI.

OpenSBI 1.3
Machine:
  Vendor ID 489
  Architecture ID 8000000000000007
  Implementation ID 4210427
Extensions:
  sbi_set_timer
  sbi_console_putchar
...[snip]...
  IPI Extension
  RFENCE Extension
  Hart State Management Extension
  System Reset Extension
  Performance Monitoring Unit Extension

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
12 months agoMerge tag 'efi-next-20231217' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Sun, 17 Dec 2023 14:11:06 +0000 (09:11 -0500)]
Merge tag 'efi-next-20231217' of https://source.denx.de/u-boot/custodians/u-boot-efi into next

Pull request for efi-next-20231217

Documentation:

* replace MD5 and SHA1 by SHA256 in examples

UEFI:

* Refactor boot manager and bootefi command to let the EFI boot method work
  without shell.

12 months agodoc: Replace examples of MD5 and SHA1 with SHA256
Sean Anderson [Sat, 2 Dec 2023 19:33:14 +0000 (14:33 -0500)]
doc: Replace examples of MD5 and SHA1 with SHA256

Both SHA1 and (especially) MD5 are no longer as safe as they once were for
cryptographic use. Replaces examples which use them with examples using
SHA256 instead. This will provide more-secure defaults for users who use
documentation examples as a base for their own use. This is not too
necessary for non-verified-boot scenarios (since someone could just replace
the checksum), but I wanted to be complete.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
12 months agobootmeth: use efi_loader interfaces instead of bootefi command
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:46 +0000 (10:29 +0900)]
bootmeth: use efi_loader interfaces instead of bootefi command

Now that efi_loader subsystem provides interfaces that are equivalent
with bootefi command, we can replace command invocations with APIs.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agocmd: efidebug: ease efi configuration dependency
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:45 +0000 (10:29 +0900)]
cmd: efidebug: ease efi configuration dependency

Now it is clear that the command actually depends on interfaces,
not "bootefi bootmgr" command.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agocmd: bootefi: move library interfaces under lib/efi_loader
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:44 +0000 (10:29 +0900)]
cmd: bootefi: move library interfaces under lib/efi_loader

In the prior commits, interfaces for executing EFI binary and boot manager
were carved out. Move them under efi_loader directory so that they can
be called from other places without depending on bootefi command.

Only efi_selftest-related code will be left in bootefi.c.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agocmd: bootefi: localize global device paths for efi_selftest
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:43 +0000 (10:29 +0900)]
cmd: bootefi: localize global device paths for efi_selftest

Device paths allocated in bootefi_test_prepare() will be immediately
consumed by do_efi_selftest() and there is no need to keep them for later
use. Introduce test-specific varialbles to make it easier to move other
bootmgr functions into library directory in the next commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agocmd: bootefi: carve out binary execution interface
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:42 +0000 (10:29 +0900)]
cmd: bootefi: carve out binary execution interface

Carve binary execution code out of do_bootefi_image() in order to move
binary-execution specific code into library directory in the later
commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agocmd: bootefi: carve out EFI boot manager interface
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:41 +0000 (10:29 +0900)]
cmd: bootefi: carve out EFI boot manager interface

Carve EFI boot manager related code out of do_bootefi_image() in order
to move boot manager specific code into library directory in the later
commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agocmd: bootefi: re-organize do_bootefi()
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:40 +0000 (10:29 +0900)]
cmd: bootefi: re-organize do_bootefi()

Replicate some code and re-organize do_bootefi() into three cases, which
will be carved out as independent functions in the next two commits.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agocmd: bootefi: unfold do_bootefi_image()
AKASHI Takahiro [Tue, 21 Nov 2023 01:29:39 +0000 (10:29 +0900)]
cmd: bootefi: unfold do_bootefi_image()

Unfold do_bootefi_image() into do_bootefi() in order to make it easier
to re-organize do_bootefi() in the next commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
12 months agoRevert "board: ti: am62x/am62ax: Update virtual interrupt allocations in board config"
Tom Rini [Sat, 16 Dec 2023 01:23:59 +0000 (20:23 -0500)]
Revert "board: ti: am62x/am62ax: Update virtual interrupt allocations in board config"

After talking with the author off-list I was reminded that this part of
the series was not supposed to be merged, only parts 1-3 upon further
review.

This reverts commit 58a277c207927530469f0ae56eff7d5f702d5486.

Signed-off-by: Tom Rini <trini@konsulko.com>
12 months agoMerge tag 'clk-2024.01-next' of https://source.denx.de/u-boot/custodians/u-boot-clk...
Tom Rini [Fri, 15 Dec 2023 22:49:13 +0000 (17:49 -0500)]
Merge tag 'clk-2024.01-next' of https://source.denx.de/u-boot/custodians/u-boot-clk into next

clock patches for u-boot/next

The main thing in here is Igor's conversion of soc_clk_dump to a clk_ops
member. There's also a write-protect feature for nuvoton clocks.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
12 months agoMerge tag 'clk-2024.01-rc5' of https://source.denx.de/u-boot/custodians/u-boot-clk
Tom Rini [Fri, 15 Dec 2023 22:48:52 +0000 (17:48 -0500)]
Merge tag 'clk-2024.01-rc5' of https://source.denx.de/u-boot/custodians/u-boot-clk

clock changes for u-boot/master

This has some clock fixes which should go in before the release. It's a bit
late in the cycle, but most of these have tests to go along with them.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
12 months agoMerge branch '2023-12-15-assorted-TI-platform-updates' into next
Tom Rini [Fri, 15 Dec 2023 21:20:24 +0000 (16:20 -0500)]
Merge branch '2023-12-15-assorted-TI-platform-updates' into next

- Assorted updates and fixes for some TI K3 platforms and SoCs

12 months agoboard: ti: k3: Remove need for CFG_SYS_SDRAM_BASE
Andrew Davis [Thu, 30 Nov 2023 14:49:11 +0000 (08:49 -0600)]
board: ti: k3: Remove need for CFG_SYS_SDRAM_BASE

The base address of extended DDR does not change across the K3 family.
Setting this per SoC is not needed. Remove this definition to help
remove the last bits from K3 include/configs/*.h files.

Signed-off-by: Andrew Davis <afd@ti.com>
12 months agotest: dm: clk_ccf: fix building error
Yang Xiwen [Fri, 15 Dec 2023 20:21:11 +0000 (04:21 +0800)]
test: dm: clk_ccf: fix building error

Fix unused variable error produced by building tests

Fixes: d3061824 (test: dm: clk_ccf: test ccf_clk_ops)
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216-b4-fix_build-v1-1-b8e79c94744f@outlook.com
12 months agoboard: ti: am62x/am62ax: Update virtual interrupt allocations in board config
Vishal Mahaveer [Tue, 28 Nov 2023 19:40:24 +0000 (13:40 -0600)]
board: ti: am62x/am62ax: Update virtual interrupt allocations in board config

Updates as a result of TIFS core now reserving a virtual interrupt
for enabling interrupts between DM to TIFS core. Because of this
change other virtual interrupt counts decrease by one.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
12 months agoboard: ti: am62x/am62ax: Update MCU GPIO interrupt allocation in board config
Vishal Mahaveer [Tue, 28 Nov 2023 19:40:23 +0000 (13:40 -0600)]
board: ti: am62x/am62ax: Update MCU GPIO interrupt allocation in board config

Share the MCU GPIO interrupts between A53 core and DM R5 core. Allocating
2 instances each to A53 and DM R5.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
12 months agoboard: ti: am62ax: Add C7x resource allocation entries to board config
Vishal Mahaveer [Tue, 28 Nov 2023 19:40:22 +0000 (13:40 -0600)]
board: ti: am62ax: Add C7x resource allocation entries to board config

Update am62ax rm-cfg with allocation entries for C7x core. Following
updates are added for C7x:
- Share split BCDMA tx and rx channels between DM R5 and C7x
- Share rings for split BCDMA tx and rx channels between DM R5 and C7x
- Add Global events and Virtual interrupts for C7x

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
12 months agoboard: ti: am62x/am62ax: Formatting updates to board config files
Vishal Mahaveer [Tue, 28 Nov 2023 19:40:21 +0000 (13:40 -0600)]
board: ti: am62x/am62ax: Formatting updates to board config files

Minor formatting updates to the rm board configuration file for
am62x and am62ax boards.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
12 months agoarm: mach-k3: Merge initial memory maps
Andrew Davis [Tue, 28 Nov 2023 17:05:28 +0000 (11:05 -0600)]
arm: mach-k3: Merge initial memory maps

The Device vs Normal memory map is the same for all K3 SoCs. Merge
the SoC specific maps into one.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
12 months agoarm: mach-k3: Remove non-cached memory map areas
Andrew Davis [Tue, 28 Nov 2023 17:05:27 +0000 (11:05 -0600)]
arm: mach-k3: Remove non-cached memory map areas

All normal memory areas should be mapped as such.

We added these un-cached holes in our memory map to hack around the
remoteproc driver missing the proper cache maintenance operations.

The problem is having these non-cached memory map areas causes stability
issues later in system operation due to the nature of the K3 coherency
architecture. Plus these are board specific carveouts and instead
should have been added at the board level, not here in the SoC common
code area.

Remove these non-cached memory map areas.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
12 months agoarm: mach-k3: Do not map ATF and OPTEE regions in MMU
Andrew Davis [Tue, 28 Nov 2023 17:05:26 +0000 (11:05 -0600)]
arm: mach-k3: Do not map ATF and OPTEE regions in MMU

ATF and OPTEE regions may be firewalled from non-secure entities. To
prevent access to this area we leave a hole there in the MMU map. This
is the same idea as [0] but we complete that patch by adding the same
for AM65, J721e, J7200, and J721s2 here.

[0] commit 0688ff3ae23c ("arm: mach-k3: arm64-mmu: do not map ATF and OPTEE regions in A53 MMU")

Signed-off-by: Andrew Davis <afd@ti.com>
12 months agoarm: mach-k3: Let the compiler size the mem_map lists
Andrew Davis [Tue, 28 Nov 2023 17:05:25 +0000 (11:05 -0600)]
arm: mach-k3: Let the compiler size the mem_map lists

NR_MMU_REGIONS is a copy/paste from another platform that extends
this list later. We do not do that, so let the list be the size
of the initializer list.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
12 months agoarm: mach-k3: Move K3 common schema.yaml out of board directory
Andrew Davis [Wed, 22 Nov 2023 21:30:05 +0000 (15:30 -0600)]
arm: mach-k3: Move K3 common schema.yaml out of board directory

This file is common for all K3, move it out of board/ directory and
into mach-k3. As we need to change the path in k3-binman.dtsi let's
take this opportunity to switch to absolute paths which makes adding
non-TI boards (like Toradex Verdin) not need to override these paths.

Signed-off-by: Andrew Davis <afd@ti.com>
12 months agotest: dm: clk_ccf: test ccf_clk_ops
Yang Xiwen [Fri, 15 Dec 2023 18:28:52 +0000 (02:28 +0800)]
test: dm: clk_ccf: test ccf_clk_ops

Assign ccf_clk_ops to .ops of clk_ccf driver so that it can act as an
clk provider. Also add "#clock-cells=<1>" to its device tree node.

Add "i2c_root" to clk_test in the device tree and driver for testing.

Get "i2c_root" clock in CCF unit tests and add tests for it.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231111-enable_count-v3-2-08a821892fa9@outlook.com
12 months agoMerge tag 'u-boot-stm32-20231215' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Fri, 15 Dec 2023 18:33:11 +0000 (13:33 -0500)]
Merge tag 'u-boot-stm32-20231215' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

_ run savedefconfig on all STM32 defconfig

STM32 MCU:
_ Sync stm32f469-disco DT with Linux 6.5
_ rework ltdc node for stm32f769-disco
_ clk: stm32f: Fix settings for LCD_CLK
_ Support display on stm32f469-disco board

STM32 MPU:
_ stm32mp_dfu : Fix board_get_alt_info_mtd()
_ stm32mp_dfu : Simplify MTD device parsing

12 months agoclk: nuvoton: add read only feature for clk driver
Jim Liu [Tue, 14 Nov 2023 09:00:04 +0000 (17:00 +0800)]
clk: nuvoton: add read only feature for clk driver

Add a flag to set ahb/apb/fiu/spi clock divider as read-only
The spi clock setting is related to booting flash, it is setup by early
bootloader.
It just protects the clock source and can't modify it in uboot.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231114090004.3746024-1-JJLIU0@nuvoton.com
12 months agocmd: clk: Make soc_clk_dump static
Igor Prusov [Thu, 9 Nov 2023 10:55:16 +0000 (13:55 +0300)]
cmd: clk: Make soc_clk_dump static

After introducing dump to clk_ops there is no need to override or expose
this symbol anymore.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-9-ivprusov@sberdevices.ru
12 months agoclk: treewide: switch to clock dump from clk_ops
Igor Prusov [Thu, 9 Nov 2023 10:55:15 +0000 (13:55 +0300)]
clk: treewide: switch to clock dump from clk_ops

Switch to using new dump operation in clock provider drivers instead of
overriding soc_clk_dump.

Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-8-ivprusov@sberdevices.ru
12 months agocmd: clk: Use dump function from clk_ops
Igor Prusov [Thu, 9 Nov 2023 10:55:14 +0000 (13:55 +0300)]
cmd: clk: Use dump function from clk_ops

Add another loop to dump additional info from clock providers that
implement dump operation.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-7-ivprusov@sberdevices.ru
12 months agoclk: Add dump operation to clk_ops
Igor Prusov [Thu, 9 Nov 2023 10:55:13 +0000 (13:55 +0300)]
clk: Add dump operation to clk_ops

This adds dump function to struct clk_ops which should replace
soc_clk_dump. It allows clock drivers to provide custom dump
implementation without overriding generic CCF dump function.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
[ Fixed parameter name in documentation ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231109105516.24892-6-ivprusov@sberdevices.ru
12 months agoclk: amlogic: Move driver and ops structs
Igor Prusov [Thu, 9 Nov 2023 10:55:12 +0000 (13:55 +0300)]
clk: amlogic: Move driver and ops structs

Move driver and ops structs to avoid forward declaration after switching
to dump in clk_ops.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-5-ivprusov@sberdevices.ru
12 months agoclk: k210: Move soc_clk_dump function
Igor Prusov [Thu, 9 Nov 2023 10:55:11 +0000 (13:55 +0300)]
clk: k210: Move soc_clk_dump function

Move clock dump function to avoid forward declaration after switching to
dump in clk_ops.

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-4-ivprusov@sberdevices.ru
12 months agoclk: ast2600: Move soc_clk_dump function
Igor Prusov [Thu, 9 Nov 2023 10:55:10 +0000 (13:55 +0300)]
clk: ast2600: Move soc_clk_dump function

Move clock dump function to avoid forward declaration after switching to
dump in clk_ops.

Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-3-ivprusov@sberdevices.ru
12 months agoclk: zynq: Move soc_clk_dump to Zynq clock driver
Igor Prusov [Thu, 9 Nov 2023 10:55:09 +0000 (13:55 +0300)]
clk: zynq: Move soc_clk_dump to Zynq clock driver

Move clock dump function in preparation for switching to dump function
in clk_ops.

Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-2-ivprusov@sberdevices.ru
12 months agodm: test: clk: Add test for ccf clk_set_rate()
Igor Prusov [Tue, 5 Dec 2023 23:23:34 +0000 (02:23 +0300)]
dm: test: clk: Add test for ccf clk_set_rate()

Add a simple test case which sets clock rate to its current value.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231205232334.2931-3-ivprusov@salutedevices.com
12 months agoclk: Check that composite clock's div has set_rate()
Igor Prusov [Tue, 5 Dec 2023 23:23:33 +0000 (02:23 +0300)]
clk: Check that composite clock's div has set_rate()

It's possible for composite clocks to have a divider that does not
implement set_rate() operation. For example, sandbox_clk_composite()
registers composite clock with a divider that only has get_rate().
Currently clk_composite_set_rate() only checks thate rate_ops are
present, so for sandbox it will cause NULL dereference during
clk_set_rate().

This patch adds rate_ops->set_rate check tp clk_composite_set_rate().

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231205232334.2931-2-ivprusov@salutedevices.com
12 months agoclk: get correct ops for clk_enable() and clk_disable()
Yang Xiwen [Sat, 18 Nov 2023 22:10:06 +0000 (06:10 +0800)]
clk: get correct ops for clk_enable() and clk_disable()

assign clk_dev_ops(clkp->dev) to ops to ensure correct clk operations
are called on clocks.

This fixes the incorrect enable_count issue as described in [1].

[1]: https://lore.kernel.org/all/SEZPR06MB695927A6DEEEF8489A06897396A7A@SEZPR06MB6959.apcprd06.prod.outlook.com/

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231111-enable_count-v2-2-20e3728600b5@outlook.com
12 months agoclk: check parent_name in clk_register to avoid confusing log_error() output
Yang Xiwen [Fri, 10 Nov 2023 19:19:52 +0000 (03:19 +0800)]
clk: check parent_name in clk_register to avoid confusing log_error() output

For some gate clocks and fixed clocks without a parent, calling
clk_register will print an useless error message indicating that parent
is missing. Fix that by gaurding log_xxx() with an if-statement.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Suggested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230807-clk-fix-v2-1-0b688e21fb4e@outlook.com
12 months agoMerge patch series "bootm: Handle compressed arm64 images with bootm"
Tom Rini [Fri, 15 Dec 2023 14:41:44 +0000 (09:41 -0500)]
Merge patch series "bootm: Handle compressed arm64 images with bootm"

To quote the author:

This little series corrects a problem I noticed with arm64 images,
where the kernel is not recognised if compression is used:

   U-Boot> tftp image.fit
   Using ethernet@7d580000 device
   TFTP from server 192.168.4.7; our IP address is 192.168.4.147
   Filename 'image.fit'.
   Load address: 0x1000000
   Loading: ##################################################  23 MiB
     20.5 MiB/s
   done
   Bytes transferred = 24118272 (1700400 hex)
   U-Boot> bootm
   ## Loading kernel from FIT Image at 01000000 ...
      Using 'conf-768' configuration
      Trying 'kernel' kernel subimage
        Description:  Linux
        Type:         Kernel Image (no loading done)
        Compression:  gzip compressed
        Data Start:   0x01000120
        Data Size:    13662338 Bytes = 13 MiB
      Verifying Hash Integrity ... OK
   Bad Linux ARM64 Image magic!

With this series:

   U-Boot> tftp 20000000 image.fit
   Using ethernet@7d580000 device
   TFTP from server 192.168.4.7; our IP address is 192.168.4.147
   Filename 'image.fit'.
   Load address: 0x20000000
   Loading: ##################################################  23.5 MiB
     20.8 MiB/s
   done
   Bytes transferred = 24642560 (1780400 hex)
   U-Boot> bootm 0x20000000
   ## Loading kernel from FIT Image at 20000000 ...
      Using 'conf-768' configuration
      Trying 'kernel' kernel subimage
        Description:  Linux
        Type:         Kernel Image (no loading done)
        Compression:  zstd compressed
        Data Start:   0x20000120
        Data Size:    14333475 Bytes = 13.7 MiB
      Verifying Hash Integrity ... OK
   Using kernel load address 80000
   ## Loading fdt from FIT Image at 20000000 ...
      Using 'conf-768' configuration
      Trying 'fdt-768' fdt subimage
        Description:  Raspberry Pi 4 Model B
        Type:         Flat Device Tree
        Compression:  zstd compressed
        Data Start:   0x215f820c
        Data Size:    9137 Bytes = 8.9 KiB
        Architecture: AArch64
      Verifying Hash Integrity ... OK
      Uncompressing Flat Device Tree to 3aff3010
      Booting using the fdt blob at 0x3aff3010
   Working FDT set to 3aff3010
      Uncompressing Kernel Image (no loading done) to 80000
   Moving Image from 0x80000 to 0x200000, end=2b00000
      Using Device Tree in place at 000000003aff3010, end 000000003afff4c4
   Working FDT set to 3aff3010

   Starting kernel ...

   [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd083]

The problem is that the arm64 magic is checked before the image is
decompressed. However this is only part of it. The kernel_noload image
type doesn't work with compression, since the kernel is not loaded. So
this series deals with that by using an lmb-allocated buffer for the
uncompressed kernel.

Another issue is that the arm64 handling is done too early, before the
image is loaded. This series moves it to after loading, so that
compression can be handled.

A patch is included to show the kernel load-address, so it is easy to
see what is going on.

One annoying feature of arm64 is that the image is often copied to
another address. It might be possible for U-Boot to figure that out
earlier and decompress it to the right place, but perhaps not.

With all of this it should be possible to boot a compressed kernel on
any of the 990 arm64 boards supported by Linux, although I have only
tested two.

12 months agobootm: Support kernel_noload with compression
Simon Glass [Sun, 19 Nov 2023 14:43:34 +0000 (07:43 -0700)]
bootm: Support kernel_noload with compression

It is not currently possible to execute the kernel in-place without
loading it. Use lmb to allocate memory for it.

Co-developed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
12 months agobootm: Move arm64-image processing later
Simon Glass [Sun, 19 Nov 2023 14:43:33 +0000 (07:43 -0700)]
bootm: Move arm64-image processing later

If the image is compressed, then the existing check fails, since the
header is wrong.

Move the check later in the boot process, after the kernel is
decompressed. This allows use of bootm with compressed kernels, while
still permitting an uncompressed kernel to be used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
12 months agoimage: Show the load address when decompressing
Simon Glass [Sun, 19 Nov 2023 14:43:32 +0000 (07:43 -0700)]
image: Show the load address when decompressing

The destination address for decompression (or copying) is useful
information. Show this to the user while booting, e.g.:

   Uncompressing Kernel Image (no loading done) to 2080000

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
12 months agoimage: Correct load_bug typo
Simon Glass [Sun, 19 Nov 2023 14:43:31 +0000 (07:43 -0700)]
image: Correct load_bug typo

Correct a typo in the function comment for image_decomp().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
12 months agoconfigs: stm32: Apply savedefconfig
Patrice Chotard [Fri, 15 Dec 2023 14:32:20 +0000 (15:32 +0100)]
configs: stm32: Apply savedefconfig

Apply savedefconfig on all stm32 defconfig.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoboard: st: common: simplify MTD device parsing
Patrice Chotard [Fri, 17 Nov 2023 17:01:07 +0000 (18:01 +0100)]
board: st: common: simplify MTD device parsing

Simplify the way all MTD devices are parsed.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
12 months agoboard: st: common: Fix board_get_alt_info_mtd()
Patrice Chotard [Fri, 17 Nov 2023 17:01:06 +0000 (18:01 +0100)]
board: st: common: Fix board_get_alt_info_mtd()

Since MTD devices are partioned, we got the following
error when command "dfu 0" is executed:

DFU alt info setting: done
ERROR: Too many arguments for nor0
ERROR: DFU entities configuration failed!
ERROR: (partition table does not match dfu_alt_info?)

Fixes: 31325e1b8b9c ("stm32mp1: dynamically build DFU_ALT_INFO")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
12 months agoboard: stm32f469-disco: add splash screen with stmicroelectronics logo
Dario Binacchi [Mon, 11 Dec 2023 22:05:56 +0000 (23:05 +0100)]
board: stm32f469-disco: add splash screen with stmicroelectronics logo

Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on stm32f469-disco board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoboard: stm32f469-disco: add support to display
Dario Binacchi [Mon, 11 Dec 2023 22:05:55 +0000 (23:05 +0100)]
board: stm32f469-disco: add support to display

Add support to Orise Tech OTM8009A display on stm32f469-disco board.

It was necessary to retrieve the framebuffer address from the device tree
because the address returned by the video-uclass driver pointed to a memory
area that was not usable.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoARM: dts: stm32: support MIPI DSI on stm32f469-disco board
Dario Binacchi [Mon, 11 Dec 2023 22:05:54 +0000 (23:05 +0100)]
ARM: dts: stm32: support MIPI DSI on stm32f469-disco board

Unlike Linux, the DSI driver requires the LTDC clock to be properly
probed. Hence, the changes made to the DSI node.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoARM: dts: stm32: make the DSI clock usable by the clock driver
Dario Binacchi [Mon, 11 Dec 2023 22:05:53 +0000 (23:05 +0100)]
ARM: dts: stm32: make the DSI clock usable by the clock driver

As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the DSI clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoARM: dts: stm32: make the LTDC clock usable by the clock driver
Dario Binacchi [Mon, 11 Dec 2023 22:05:52 +0000 (23:05 +0100)]
ARM: dts: stm32: make the LTDC clock usable by the clock driver

As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the LTDC clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoARM: dts: stm32f469-disco: sync with Linux 6.5
Dario Binacchi [Mon, 11 Dec 2023 22:05:51 +0000 (23:05 +0100)]
ARM: dts: stm32f469-disco: sync with Linux 6.5

Sync the devicetree with linux 6.5 for stm32f746-disco board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoclk: stm32f: fix setting of LCD clock
Dario Binacchi [Sat, 11 Nov 2023 10:46:19 +0000 (11:46 +0100)]
clk: stm32f: fix setting of LCD clock

Set pllsaidivr only if the PLLSAIR output frequency is an exact multiple
of the pixel clock rate. Otherwise, we search through all combinations
of pllsaidivr * pllsair and use the one which gives the rate closest to
requested one.

Fixes: 5e993508cb25 ("clk: clk_stm32f: Add set_rate for LTDC clock")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoclk: stm32f: fix setting of division factor for LCD_CLK
Dario Binacchi [Sat, 11 Nov 2023 10:46:18 +0000 (11:46 +0100)]
clk: stm32f: fix setting of division factor for LCD_CLK

The value to be written to the register must be appropriately shifted,
as is correctly done in other parts of the code.

Fixes: 5e993508cb25 ("clk: clk_stm32f: Add set_rate for LTDC clock")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoARM: dts: stm32f769-disco: rework ltdc node
Dario Binacchi [Sat, 11 Nov 2023 10:44:36 +0000 (11:44 +0100)]
ARM: dts: stm32f769-disco: rework ltdc node

With commit f479f5dbb7ac ("ARM: dts: stm32: add ltdc support on
stm32f746 MCU"), which adds the 'ltdc' node in stm32f746.dtsi, we can
simplify stm32f769-disco-uboot.dtsi and align stm32f769-disco.dtsi with
the kernel version.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 months agoMerge tag 'u-boot-imx-20231214' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Fri, 15 Dec 2023 13:22:20 +0000 (08:22 -0500)]
Merge tag 'u-boot-imx-20231214' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

- Fix for i.MX8M Plus eDM SBC DDR timings with inline ECC
- Switch to FPWM mode on Data Modul i.MX8M Plus eDM SBC so that DRAM
  EDAC detects more correctable errors
- Fix for imx8mp-venice board DDR initialization

12 months agoimx8mp-venice: update DRAM config for 2000MHz
Tim Harvey [Thu, 14 Dec 2023 16:22:27 +0000 (08:22 -0800)]
imx8mp-venice: update DRAM config for 2000MHz

The imx8mp venice boards can support 2000Mhz DRAM.
Update the DRAM config to support this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
12 months agoimx8mp-venice: fix DRAM bus configuration
Tim Harvey [Thu, 14 Dec 2023 16:22:26 +0000 (08:22 -0800)]
imx8mp-venice: fix DRAM bus configuration

The DRAM configuration for the 1GB and 4GB imx8mp venice boards had a
bus mapping issue (channel A and B swapped) which creates an invalid
deskewing configuration during training causing the DRAM to not be able
to run at its full bus speed.

Update the various config structures to resolve this.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
12 months agoboard: gateworks: venice: remove extra file
Tim Harvey [Thu, 14 Dec 2023 16:22:25 +0000 (08:22 -0800)]
board: gateworks: venice: remove extra file

Remove lpddr4_timing_imx8mm_512mb.c mistakenly committed

Fixes: a1c711046b0d "(board: gateworks: venice: add imx8mm-gw7903 support)"
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
12 months agoARM: imx: Update DRAM timings with inline ECC on Data Modul i.MX8M Plus eDM SBC
Marek Vasut [Thu, 7 Dec 2023 17:50:32 +0000 (18:50 +0100)]
ARM: imx: Update DRAM timings with inline ECC on Data Modul i.MX8M Plus eDM SBC

Import DRAM timings generated by the DDR tool 3.31 which introduce assorted
tweaks to the DRAM controller settings. Furthermore, enable DBI to improve
noise resilience of the DRAM bus by reducing the number of bit changes on
the bus.

Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors
reported by EDAC . It is not entirely clear why the slightly faster setting
does produce sporadic correctable errors, while this one does not, but this
could be related to simpler PLL setting at 3600 MTps.

Enable inline ECC which is necessary to detect ECC errors and collect
statistics by the EDAC driver in Linux. This reduces the DRAM size by
64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available
DRAM size becomes 3.5 GiB .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoARM: imx: Force DRAM regulators into FPWM mode on Data Modul i.MX8M Plus eDM SBC
Marek Vasut [Thu, 7 Dec 2023 17:50:31 +0000 (18:50 +0100)]
ARM: imx: Force DRAM regulators into FPWM mode on Data Modul i.MX8M Plus eDM SBC

In case the Buck5 and Buck6 regulators which supply DRAM Vdd1 and Vdd2/Vddq
respectively operate in automatic PWM/PFM mode, the DRAM EDAC detects more
correctable errors than if the regulators operate in forced PWM only mode.
Force DRAM regulators to forced PWM mode only to stop tempting the DRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoARM: imx: Enable CAAM on DH i.MX8M Plus DHCOM
Marek Vasut [Sat, 2 Dec 2023 01:58:28 +0000 (02:58 +0100)]
ARM: imx: Enable CAAM on DH i.MX8M Plus DHCOM

Enable CAAM in U-Boot to make crypto available early in the boot process.

This has a side-effect that in case an older kernel version contains a
broken CAAM initialization timeout code, initialization in bootloader
will help that old kernel version function correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoARM: imx: Enable CAAM on Data Modul i.MX8M Mini/Plus eDM SBC
Marek Vasut [Sat, 2 Dec 2023 01:55:06 +0000 (02:55 +0100)]
ARM: imx: Enable CAAM on Data Modul i.MX8M Mini/Plus eDM SBC

Enable CAAM in U-Boot to make crypto available early in the boot process.

This has a side-effect that in case an older kernel version contains a
broken CAAM initialization timeout code, initialization in bootloader
will help that old kernel version function correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoddr: imx: Add 3600 MTps rate support
Marek Vasut [Sat, 2 Dec 2023 01:48:40 +0000 (02:48 +0100)]
ddr: imx: Add 3600 MTps rate support

Add PLL settings for DDR 3600 MTps . This is very similar to 3200 MTps
PLL setting, except the divider is not 9 but 8 .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoddr: imx: Handle 3734 in addition to 3733 and 3732 MTps rates
Marek Vasut [Sat, 2 Dec 2023 01:48:00 +0000 (02:48 +0100)]
ddr: imx: Handle 3734 in addition to 3733 and 3732 MTps rates

The new MX8M DDR tool 3.31 now generates a programming file which uses
data rate 3734 instead of 3733 or 3732 . Handle another rounding option .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoarm64: imx8mp: Inhibit DTC warning on DH i.MX8MP DHCOM rev.100 DTO
Marek Vasut [Sun, 5 Nov 2023 00:04:32 +0000 (01:04 +0100)]
arm64: imx8mp: Inhibit DTC warning on DH i.MX8MP DHCOM rev.100 DTO

Inhibit DTC warning in imx8mp-dhcom-pdk3-overlay-rev100.dts:
"
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (reg_format): /fragment@0/__overlay__:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #address-cells value
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #size-cells value
"

The DTO overwrites the 'reg' property of an ethernet PHY and is only
used on specific combination of old prototype SoM and old prototype
PDK3 carrier board, which had incorrectly placed pull resistor, which
made the PHY change its MDIO address in that specific combination and
which is already fixed on production hardware.

The DTO is implemented in this simple manner because if it contained a
full MDIO bus node reference to define #address-cells and #size-cells,
it would also require a full new copy of the PHY node, i.e.
ethernet-phy@5 { ... reg = <5>; ... }, to avoid DTC warnings about
mismatch between node unit and reg value. The node unit in SoM DT is
ethernet-phy@7 { ... }; .

This simpler approach avoids unnecessary duplication without adverse
side effects.

Reported-by: Fabio Estevam <festevam@denx.de>
Reported-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoMerge tag 'xilinx-for-v2024.04-rc1' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Thu, 14 Dec 2023 18:27:11 +0000 (13:27 -0500)]
Merge tag 'xilinx-for-v2024.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2024.04-rc1

zynqmp:
- Introduce Kria specific defconfig
- Calculate SPI image location based on boot offset
- DT updates

zynqmp-clk:
- Fix topsw_lsbus_clock for DP

axi-enet:
- Support older DT binding

mailbox:
- Add support for multiple mailboxes

pcie-xilinx:
- Covert driver to newer interface
- Enable MMIO region

zynq:
- dfu updates
- Enable capsule update for Antminer S9
- DT updates

xilinx_spi:
- Add new xfer callback and support runtime fifo depth discovery

12 months agospi: cadence-quadspi: Fix error message on stuck busy state
Jan Kiszka [Mon, 30 Oct 2023 16:20:29 +0000 (17:20 +0100)]
spi: cadence-quadspi: Fix error message on stuck busy state

We are not iterating CQSPI_REG_RETRY, we are waiting 'timeout' ms, since
day 1.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
12 months agomtd: spi-nor-ids: add support for xtx XT55Q02G
Bruce Suen [Wed, 18 Oct 2023 03:38:02 +0000 (23:38 -0400)]
mtd: spi-nor-ids: add support for xtx XT55Q02G

Add support for XTX XT55Q02G(1.8V,2Gbit).

Signed-off-by: Bruce Suen <bruce_suen@163.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
12 months agomtd: spinand: add support for ESMT F50x1G41LB
Igor Prusov [Tue, 17 Oct 2023 19:29:26 +0000 (22:29 +0300)]
mtd: spinand: add support for ESMT F50x1G41LB

Adaptation of Linux commit d74c36480a67

This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
It seems that ESMT likes to use random JEDEC ID from other vendors.
Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
JEDEC ID in variable name.

Datasheets:
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Tested-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
12 months agomtd: spi-nor-core: Implement spi_nor_read_sfdp_dma_unsafe() for sfdp parse
Vaishnav Achath [Fri, 3 Jun 2022 07:01:32 +0000 (12:31 +0530)]
mtd: spi-nor-core: Implement spi_nor_read_sfdp_dma_unsafe() for sfdp parse

During SFDP header parse and BFPT parse, structures in stack are used
to perform spi_nor_read_sfdp() which expects a dma-safe buffer.

This commit introduces spi_nor_read_sfdp_dma_unsafe() to wrap
spi_nor_read_sfdp() using a kmalloc'ed bounce buffer which is
the same implementation in Linux (drivers/mtd/spi-nor/sfdp.c).

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
12 months agoMerge tag 'u-boot-imx-next-20231214' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Thu, 14 Dec 2023 12:37:02 +0000 (07:37 -0500)]
Merge tag 'u-boot-imx-next-20231214' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next

- Add TPM support for venice boards
- Add networking support for imx93-evk
- Enable TCP, IPv6, wget for DHCOM and Data Modul boards
- Enable fastboot support for Toradex boards
- Allow pico-imx7d to boot from SD
- Enable fastboot for beacon imx8m beacon boards, disabled
  SYS_CONSOLE_IS_IN_ENV
- Fix mxsboot to prevent NAND blocks being reported as bad
- Add imx8mm PWM clock support
- Several devicetree syncs with the kernel
- Add support for i.MX8MP Polyhex Debix Model A SBC
- Reworked ddr_load_train_firmware() to get a 50ms boot time improvement

12 months agoarm64: imx8mp: Enable TCP, IPv6, wget on Data Modul i.MX8M eDM SBC
Marek Vasut [Wed, 22 Nov 2023 23:37:38 +0000 (00:37 +0100)]
arm64: imx8mp: Enable TCP, IPv6, wget on Data Modul i.MX8M eDM SBC

Enable support for TCP protocol, wget, and IPv6 on this platform.
The former two allow users download payload into the U-Boot from
a web server, which may be more convenient or easier to set up
than TFTP server. The later is enabled to future proof the IP
stack on this platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoarm64: imx8mp: Enable TCP, IPv6, wget on DH i.MX8MP DHCOM
Marek Vasut [Sat, 4 Nov 2023 16:32:21 +0000 (17:32 +0100)]
arm64: imx8mp: Enable TCP, IPv6, wget on DH i.MX8MP DHCOM

Enable support for TCP protocol, wget, and IPv6 on this platform.
The former two allow users download payload into the U-Boot from
a web server, which may be more convenient or easier to set up
than TFTP server. The later is enabled to future proof the IP
stack on this platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoarm: imx6: Enable TCP, IPv6, wget on DH i.MX6 DHCOM
Marek Vasut [Sat, 4 Nov 2023 16:32:20 +0000 (17:32 +0100)]
arm: imx6: Enable TCP, IPv6, wget on DH i.MX6 DHCOM

Enable support for TCP protocol, wget, and IPv6 on this platform.
The former two allow users download payload into the U-Boot from
a web server, which may be more convenient or easier to set up
than TFTP server. The later is enabled to future proof the IP
stack on this platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
12 months agoMerge tag 'dm-next-13dec23' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm...
Tom Rini [Wed, 13 Dec 2023 21:02:38 +0000 (16:02 -0500)]
Merge tag 'dm-next-13dec23' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next

minor improvements to test, acpi
updates for new PyPl release

12 months agotest: vboot: Using variable 'old_dtb' before assignment
Heinrich Schuchardt [Mon, 11 Dec 2023 18:07:33 +0000 (19:07 +0100)]
test: vboot: Using variable 'old_dtb' before assignment

old_dtb can only be assumed initialized in the finally block
if it is assigned a value before the try statement.

Avoid a pylint error reported by current pylint.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
12 months agotest: fit: Using variable 'old_dtb' before assignment
Heinrich Schuchardt [Mon, 11 Dec 2023 18:07:32 +0000 (19:07 +0100)]
test: fit: Using variable 'old_dtb' before assignment

old_dtb can only be assumed initialized in the finally block
if it is assigned a value before the try statement.

Avoid a pylint error reported by current pylint.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
12 months agobinman: elf: Using variable 'old_val' before assignment
Heinrich Schuchardt [Sat, 9 Dec 2023 18:50:31 +0000 (19:50 +0100)]
binman: elf: Using variable 'old_val' before assignment

old_val can only be assumed initialized in the finally block
if it is assigned a value before the try statement.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
12 months agocmd: check argc for acpi dump
Heinrich Schuchardt [Sat, 9 Dec 2023 17:05:36 +0000 (18:05 +0100)]
cmd: check argc for acpi dump

'acpi dump' without parameter results in a NULL dereference. Check the
number of arguments.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
12 months agobootstd: Fix a memory leak in the efi manager bootflow
Ilias Apalodimas [Thu, 7 Dec 2023 12:36:36 +0000 (14:36 +0200)]
bootstd: Fix a memory leak in the efi manager bootflow

efi_get_var() allocates memory which has to be freed after the value of
the variable is consumed. Free the memory properly

Fixes: f2bfa0cb1794 ("bootstd: Make efi_mgr bootmeth work for non-sandbox setups")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>