SE HMIBSC board uses UART1 as the main debug console, so add
corresponding clocks and pinmux support. Along with that update
instructions to enable clocks for debug UART support.
qcom: Don't enable LINUX_KERNEL_IMAGE_HEADER by default
Enabling LINUX_KERNEL_IMAGE_HEADER by default doesn't allow
ENABLE_ARM_SOC_BOOT0_HOOK to work properly on db410c when U-Boot is
loaded as a first stage bootloader. It leads to secondary CPUs bringup
failure and later causing the Linux kernel to freeze.
So fix it via selectively enabling LINUX_KERNEL_IMAGE_HEADER where it's
actually required.
Robert Marko [Mon, 22 Apr 2024 11:43:28 +0000 (13:43 +0200)]
pinctrl: qcom: ipq4019: support all pin functions
Currently, IPQ4019 pinctrl driver supports only a very limited number of
pin functions and is not fully DT compatible with Linux pinctrl nodes.
IPQ40xx SoC-s sometimes use different pin function numbers for the same
function depending on the pin number, so for example I2C0 on GPIO58 uses
function number 3 while on GPIO59 it uses function number 2.
So, in order to make the driver compatible with upstream DTS to avoid the
need to patch the pinctrl nodes in U-Boot and support all of the missing
pin functions lets rework the driver based on upstream Linux IPQ4019
pinctrl driver and the pending SM8150 U-Boot pinctrl driver which also uses
different function numbers pased on the exact pin number.
Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Robert Marko [Mon, 22 Apr 2024 11:43:27 +0000 (13:43 +0200)]
pinctrl: qcom: ipq4019: enable DM_FLAG_PRE_RELOC
If compiled with logging and debug UART support, the following is printed:
serial_msm serial@78af000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
This is due to the fact that IPQ4019 pinctrl driver is not available prior
to relocation and thus MSM serial will fail probing as pinctrl provider is
not available.
So, lets enable DM_FLAG_PRE_RELOC for IPQ4019 pinctrl to fix this.
Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Robert Marko [Mon, 22 Apr 2024 11:43:24 +0000 (13:43 +0200)]
pinctrl: qcom: allow selecting with ARCH_IPQ40XX
IPQ4019 pinctrl driver was moved to the dedicated Qualcomm pinctrl
directory, but the KConfig depends on ARCH_SNAPDRAGON only and thus
PINCTRL_QCOM_IPQ4019 cannot be selected when ARCH_IPQ40XX is used.
Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
The driver currently requires the bit clock divider be hardcoded in
devicetree (or use the hardcoded default from apq8016).
The bit clock divider is used to derive the baud rate from the core
clock:
baudrate = clk_rate / csr_div
clk_rate is the actual programmed core clock rate which is returned by
clk_set_rate(), and this UART driver only supports a baudrate of 115200.
We can therefore determine the appropriate value for UARTDM_CSR by
iterating over the possible values and finding the one where the
equation above holds true for a baudrate of 115200.
Implement this logic and drop the non-standard DT bindings for this
driver.
Tested on dragonboard410c.
Tested-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
clk/qcom: ipq4019: return valid rate when setting UART clock
clk_set_rate() should return the clock rate that was set. The IPQ4019
clock driver doesn't set any rates yet but it should still return the
expected value so that drivers can work properly.
For a baud rate of 115200 with an expected bit clock divisor of 16, the
clock rate should be 1843200 so return that frequency.
clk/qcom: apq8016: return valid rate when setting UART clock
The clk_init_uart() helper always returns 0, but we're meant to return a
real clock rate. Given that we hardcode 115200 baud, just return the
clock rate that we set.
Robert Marko [Mon, 15 Apr 2024 10:49:26 +0000 (12:49 +0200)]
serial: msm_serial: remove .clk_rate from debug UART
MSM serial in DEBUG UART mode is trying to set .clk_rate, but the
msm_serial_data structure does not have such property at all, so lets
remove it as otherwise it will fail compiling.
Fixes: 90023bdfe979 ("serial: msm: add debug UART") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
mach-snapdragon: Allow other board vendors apart from Qcom
Qcom SoCs derived boards can come from various OEMs/ODMs and not just
Qcom itself. So allow CONFIG_SYS_VENDOR to be set correctly
corressponding to the actual board vendor.
Neil Armstrong [Thu, 4 Apr 2024 16:46:39 +0000 (18:46 +0200)]
clk: qcom: Add SM8650 clock driver
Add the GCC and TCSRCC clock driver for the SM8650 SoC.
The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
only supports gates.
The GCC enable and set_rate callbacks contains some tweaks to
setup clocks for Debug UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.
Neil Armstrong [Thu, 4 Apr 2024 16:46:38 +0000 (18:46 +0200)]
clk: qcom: Add SM8550 clock driver
Add the GCC and TCSRCC clock driver for the SM8550 SoC.
The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
only supports gates.
The GCC enable and set_rate callbacks contains some tweaks to
setup clocks for Debug UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.
mmc: msm_sdhci: use a more sensible default clock rate
We currently default to the lowest rate but this actually doesn't work
on most platforms. Default to the HS400 speed instead which is most
common on Qualcomm platforms.
mmc: msm_sdhci: correct vendor_spec_cap0 register for v5
The V4 and V5 controllers have quite varied register layouts. Inherit
the register offsets and naming from the Linux driver. More version
specific offsets can be inherited from Linux as needed.
Fixes: 364c22a ("mmc: msm_sdhci: Add SDCC version 5.0.0 support") Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Tom Rini [Mon, 22 Apr 2024 17:02:16 +0000 (11:02 -0600)]
Merge patch series "configs: apple: Switch to standard boot + small adjustments"
Janne Grunau <j@jannau.net> says:
This series contains a few misc config changes for Apple silicon
systems:
- switch from the deprecated distro boot scripts to standard boot
- allows EFI console resizing based on the video console size
- enables 16x32 bitmap fonts as Apple devices come with high DPI
displays
- enables 64-bit LBA addressing
Janne Grunau [Thu, 18 Apr 2024 19:00:27 +0000 (21:00 +0200)]
configs: apple: Enable CMD_SELECT_FONT and FONT_16X32
Apple devices have high DPI displays so the larger fonts are preferable
for improved readability. This does not yet change the used font based
on the display's pixel density so the standard 8x16 font is still used
by default.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Janne Grunau <j@jannau.net>
Janne Grunau [Thu, 18 Apr 2024 19:00:26 +0000 (21:00 +0200)]
configs: apple: Use "vidconsole,serial" as stdout/stderr
The display size querying in efi_console relies on this order. The
display should be the primary output device and should be used to
display more than 80x25 chars.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Janne Grunau <j@jannau.net>
Hector Martin [Thu, 18 Apr 2024 19:00:25 +0000 (21:00 +0200)]
apple_m1_defconfig: Turn on CONFIG_SYS_64BIT_LBA
This makes USB HDDs >2TiB work. The only reason this hasn't bitten us
for the internal NVMe yet is the 4K sector size, because the largest SSD
Apple sells is 8TB and we can handle up to 16TiB with that sector size.
Close call.
Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Janne Grunau <j@jannau.net>
Tom Rini [Mon, 22 Apr 2024 17:01:56 +0000 (11:01 -0600)]
Merge patch series "Kconfig: some cleanups"
Michal Simek <michal.simek@amd.com> says:
I looked as cleaning up some dependencies and I found that qconfig is
reporting some issues. This series is fixing some of them. But there are
still some other pending. That's why please go and fix them if they are
related to your board.
UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in
a loop you will find some other issue with copyright chars or some issues
in files taken from the Linux kernel like DTs. They should be likely fixed
in the kernel first.
Based on discussion I am ignoring names too.
Michal Simek [Tue, 16 Apr 2024 06:55:18 +0000 (08:55 +0200)]
Kconfig: Make all Kconfig encoding ascii
Some of Kconfigs are using utf-8 encoding because of used chars. Convert
all of them to ascii enconging. Based on discussion ASCII should be used in
general with the exception of names.
Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Michal Simek [Tue, 16 Apr 2024 06:55:17 +0000 (08:55 +0200)]
Kconfig: Add missing quotes around default string value
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: style: quotes recommended around default value for string symbol
EFI_VAR_SEED_FILE (defined at lib/efi_loader/Kconfig:130)
Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Michal Simek [Tue, 16 Apr 2024 06:55:16 +0000 (08:55 +0200)]
Kconfig: Add missing quotes around source file
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
drivers/crypto/Kconfig:9: warning: style: quotes recommended around
'drivers/crypto/nuvoton/Kconfig' in 'source drivers/crypto/nuvoton/Kconfig'
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Tue, 16 Apr 2024 06:55:15 +0000 (08:55 +0200)]
Kconfig: Remove trailing whitespace in its prompt
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
warning: SPL_CLK_CCF (defined at drivers/clk/Kconfig:59) has leading or
trailing whitespace in its prompt
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Mon, 22 Apr 2024 16:24:34 +0000 (10:24 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Not many and nothing really exciting this time: there are more patches
in fly, but they are not ready yet. I will also send some DT updates
and new board defconfig files later, once they have seen the list. I am
aware of the USB rebasing repo efforts, but would like to see how this
plays out, also we have one compatibility issue that I painstakingly
work around in the U-Boot tree for the last three years or so. So for
now I stick to the previous approach.
So now just some easy changes: support for USB peripheral mode on the
Allwinner F1C100s, T113-s3 SPI boot support, and some SPL cleanup
patches.
The branch passed the gitlab CI run, and brief boot testing on some
boards didn't turn up any issues.
board: asus: tf700t: bind tc358768 bridge and panel
Of all T30 transformers, only the TF700T has a FullHD DSI panel,
which is connected via tc358768 RGB to DSI bridge. Since the
bridge driver is available now, TF700T can have video support.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Thu, 25 Jan 2024 12:24:22 +0000 (14:24 +0200)]
board: asus: transformer-t30: enable I2C_MUX only for TF700T
Of all T30 transformers, only the TF700T uses GPIO i2c muxing
for one of the i2c lines and needs this driver to properly work.
Disable this configuration for all transformers except tf700t
in their fragments.
Svyatoslav Ryhel [Thu, 25 Jan 2024 12:19:06 +0000 (14:19 +0200)]
board: asus: tf600t: enable TEGRA20_SLINK only for TF600T
Of all T30 transformers, only the TF600T uses SPI flash and
needs SLINK driver to work with it. Move this configuration
to the tf600t fragment from common defconfig.
Andre Przywara [Thu, 7 Dec 2023 15:43:21 +0000 (15:43 +0000)]
sunxi: sun9i: make more clock functions SPL only
In clock_sun9i.c, responsible for (mostly early) clock setup on the
Allwinner A80 SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM, and
they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Move some functions around, to group all SPL-only function within
one #ifdef guard. Some functions were exported, but never used outside
of this file, so remove their prototypes from the header file and mark
them as static.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 7 Dec 2023 15:42:47 +0000 (15:42 +0000)]
sunxi: sun8i_a83t: make more clock functions SPL only
In clock_sun8i_a83t.c, responsible for (mostly early) clock setup on the
Allwinner A83T SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 7 Dec 2023 16:07:05 +0000 (16:07 +0000)]
sunxi: sun50i_h6: make more clock functions SPL only
In clock_sun50i_h6.c, responsible for (mostly early) clock setup on
newer generation Allwinner SoCs, many functions are only needed by the
SPL, and are thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only. By moving the clock_get_pll6()
function to the end of the file, all SPL-only clocks can be contained
within one #ifdef guard.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 7 Dec 2023 16:06:51 +0000 (16:06 +0000)]
sunxi: sun6i: make more clock functions SPL only
In clock_sun6i.c, responsible for (mostly early) clock setup on older
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 7 Dec 2023 16:06:51 +0000 (16:06 +0000)]
sunxi: sun4i: make more clock functions SPL only
In clock_sun4i.c, responsible for (mostly early) clock setup on early
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.
Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.
This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.
This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 7 Dec 2023 16:06:04 +0000 (16:06 +0000)]
sunxi: compile clock.c for SPL only
With the clock_twi_onoff() function now being called only from the SPL,
the whole clock.c file in arch/arm/mach-sunxi is needed by SPL code
only.
Remove the redundant #ifdef from the clock_init() function, actually
this function was already only called from the SPL.
Then adjust the Makefile to compile clock.c only with CONFIG_SPL_BUILD
defined.
This avoids unnecessary code in U-Boot proper and allows further
refactoring and code-split between the SPL and U-Boot proper.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Tue, 2 Jan 2024 15:02:51 +0000 (15:02 +0000)]
sunxi: remove unneeded i2c_init_board() call for U-Boot proper
The driver used for the Allwinner I2C IP is using proper DT and DM
enablement for a while: we enable the clock gate and de-assert the reset
line in the driver's probe() routine, and the pinmux setup is taken care
of by the DM framework.
This means the explicit call to the i2c_init_board() routine is not
needed for U-Boot proper. As the board_init() function in board.c is
only called for U-Boot proper, we can remove the call, something that
the comment there hinted at already.
Fix the comment for the board_init() function on the way: we were not
really doing board specific setup there. The fact that this function
is called from U-Boot proper only is probably more helpful for reasoning
about this code.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 7 Dec 2023 15:09:51 +0000 (15:09 +0000)]
sunxi: move #ifdef guards around tzpc_init() to header file
Some later 32-bit SoCs require some setup of the Secure Peripherals
Controller, which is handled in tzpc_init().
At the moment this is guarded in board.c by some #ifdefs selecting the
SoCs that need it.
Move those #ifdef guards into the header file, providing an empty stub
function for all other SoCs, so that the #ifdefs can be removed from the
.c file, to improve readability.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Fri, 13 Oct 2023 22:12:14 +0000 (23:12 +0100)]
usb: musb-new: add Allwinner F1C100s support
The Allwinner F1C100s SoC has a MUSB controller like the one in the A33,
but needs an SRAM region to be claimed like the A10. We do the latter
anyway, even on chips that don't need it, so there is no real difference
in our compatible string matching.
Add a mapping between the config struct used in the Linux to our
requirements here on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Maksim Kiselev [Sat, 11 Nov 2023 13:33:07 +0000 (16:33 +0300)]
sunxi: SPL SPI: Add SPI boot support for the Allwinner R528/T113 SoCs
R528/T113 SoCs uses the same SPI IP as the H6, also have the same clocks
and reset bits layout, but the CCU base is different. Another difference
is that the new SoCs do not have a clock divider inside. Instead of this
we should configure sample mode depending on input clock rate.
The pin assignment is also different: the H6 uses PC0, the R528/T113 PC4
instead. This makes for a change in spi0_pinmux_setup() routine.
This patch extends the H6/H616 #ifdef guards to also cover the R528/T113,
using the shared CONFIG_SUNXI_GEN_NCAT2 and CONFIG_MACH_SUN8I_R528
symbols. Also use CONFIG_SUNXI_GEN_NCAT2 symbol for the Kconfig
dependency.
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
- simple_panel: support timing parsing from EDID
- dw_hdmi: fix gcc-14 compiler warnings
- dw_hdmi: support vendor PHY for HDMI
- rockchip: add Rockchip INNO HDMI PHY driver
- rockchip: RK3328 HDMI and VOP support
- evb-rk3328: enable vidconsole support
- Tegra DC and DSI improvements and Tegra 114 support
- add LG LG070WX3 MIPI DSI panel driver
- add Samsung LTL106HL02 MIPI DSI panel driver
- add Toshiba TC358768 RGB to DSI bridge support
- add basic support for the Parade DP501 transmitter
- Tegra 3 panel and bridge driver improvements
- simplefb: modernise DT parsing
- fdt_simplefb: Enumerate framebuffer info from video handoff
- preserve framebuffer if SPL is passing video hand-off
- fdt_support: allow reserving FB region without simplefb
Devarsh Thakkar [Thu, 22 Feb 2024 13:08:10 +0000 (18:38 +0530)]
boot: Move framebuffer reservation to separate helper
Create separate helper for just reserving framebuffer region without
creating or enabling simple-framebuffer node.
This is useful for scenarios where user want to preserve the bootloader
splash screen till OS boots up and display server gets started without
displaying anything else in between and thus not requiring
simple-framebuffer.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Devarsh Thakkar [Thu, 22 Feb 2024 13:08:09 +0000 (18:38 +0530)]
video: Assume video to be active if SPL is passing video hand-off
If SPL is passing video handoff structure to U-boot then it is safe to
assume that SPL has already enabled video and that's why it is passing
video handoff structure to U-boot so that U-boot can preserve the
framebuffer.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Devarsh Thakkar [Thu, 22 Feb 2024 13:08:08 +0000 (18:38 +0530)]
boot: fdt_simplefb: Enumerate framebuffer info from video handoff
Enable and update simple-framebuffer node using the video handoff
bloblist if video was enabled at SPL stage and corresponding video
bloblist was received at u-boot proper with necessary parameters.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
Caleb Connolly [Fri, 16 Feb 2024 18:38:06 +0000 (18:38 +0000)]
video: simplefb: modernise DT parsing
simplefb was using old style FDT parsing which doesn't behave well in
combination with livetree. Update it to use ofnode instead and add a
missing null check for the "format" property.
Jonas Schwöbel [Wed, 31 Jan 2024 06:57:18 +0000 (08:57 +0200)]
video: bridge: add basic support for the Parade DP501 transmitter
The Parade DP501 is a DP & DVI/HDMI dual-mode transmitter. It
enables an RGB/Parallel SOC output to be converted, packed and
serialized into either DP or TMDS output device. Only DisplayPort
functionality of this transmitter has been implemented and tested.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
LTL106HL02 is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD) that uses amorphous silicon TFT as
switching devices. This model is composed of a TFT LCD panel, a
driver circuit and a backlight unit. The resolution of a 10.6"
contains 1920 x 1080 pixels and can display up to 16,8M color
with wide viewing angle.
Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Svyatoslav Ryhel [Wed, 31 Jan 2024 06:57:15 +0000 (08:57 +0200)]
video: panel: add LG LG070WX3 MIPI DSI panel driver
The LD070WX3 is a Color Active Matrix Liquid Crystal Display with
an integral Light Emitting Diode (LED) backlight system. The
matrix employs a-Si Thin Film Transistor as the active element. It
is a transmissive type display operating in the normally Black
mode. This TFT-LCD has 7.0 inches diagonally measured active
display area with WXGA resolution (800 by 1280 pixel array).
projects / u-boot.git / log
