From: Michal Simek Date: Fri, 24 Jun 2022 12:14:59 +0000 (+0200) Subject: mips: Move endianness selection to arch/Kconfig X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-logo.png?a=commitdiff_plain;h=89e81e6c32bba4b92172019068b81c025698395a;p=u-boot.git mips: Move endianness selection to arch/Kconfig This option will be used by Microblaze that's why move it to generic location to be able to use it. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com --- diff --git a/arch/Kconfig b/arch/Kconfig index 12de8a1165..4851300e9b 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -447,3 +447,25 @@ source "arch/xtensa/Kconfig" source "arch/riscv/Kconfig" source "board/keymile/Kconfig" + +if MIPS + +choice + prompt "Endianness selection" + help + Some MIPS boards can be configured for either little or big endian + byte order. These modes require different U-Boot images. In general there + is one preferred byteorder for a particular system but some systems are + just as commonly used in the one or the other endianness. + +config SYS_BIG_ENDIAN + bool "Big endian" + depends on SUPPORTS_BIG_ENDIAN + +config SYS_LITTLE_ENDIAN + bool "Little endian" + depends on SUPPORTS_LITTLE_ENDIAN + +endchoice + +endif diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9b62764f4f..2e0793a7a7 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -180,24 +180,6 @@ source "arch/mips/mach-octeon/Kconfig" if MIPS -choice - prompt "Endianness selection" - help - Some MIPS boards can be configured for either little or big endian - byte order. These modes require different U-Boot images. In general there - is one preferred byteorder for a particular system but some systems are - just as commonly used in the one or the other endianness. - -config SYS_BIG_ENDIAN - bool "Big endian" - depends on SUPPORTS_BIG_ENDIAN - -config SYS_LITTLE_ENDIAN - bool "Little endian" - depends on SUPPORTS_LITTLE_ENDIAN - -endchoice - choice prompt "CPU selection" default CPU_MIPS32_R2