From: Aaron Williams Date: Thu, 7 Apr 2022 07:11:41 +0000 (+0200) Subject: mips: octeon: Add cvmx-pko-internal-ports-range.c X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-logo.png?a=commitdiff_plain;h=604a5f837e9961fb52929be8c028afc761ae38e9;p=u-boot.git mips: octeon: Add cvmx-pko-internal-ports-range.c Import cvmx-pko-internal-ports-range.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams Signed-off-by: Stefan Roese --- diff --git a/arch/mips/mach-octeon/cvmx-pko-internal-ports-range.c b/arch/mips/mach-octeon/cvmx-pko-internal-ports-range.c new file mode 100644 index 0000000000..694b4e3d9c --- /dev/null +++ b/arch/mips/mach-octeon/cvmx-pko-internal-ports-range.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018-2022 Marvell International Ltd. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +union interface_port { + struct { + int port; + int interface; + } s; + u64 u64; +}; + +static int dbg; + +static int port_range_init; + +int __cvmx_pko_internal_ports_range_init(void) +{ + int rv = 0; + + if (port_range_init) + return 0; + port_range_init = 1; + rv = cvmx_create_global_resource_range(CVMX_GR_TAG_PKO_IPORTS, + CVMX_HELPER_CFG_MAX_PKO_QUEUES); + if (rv != 0) + debug("ERROR : Failed to initialize pko internal port range\n"); + return rv; +} + +int cvmx_pko_internal_ports_alloc(int xiface, int port, u64 count) +{ + int ret_val = -1; + union interface_port inf_port; + struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface); + + __cvmx_pko_internal_ports_range_init(); + inf_port.s.interface = xi.interface; + inf_port.s.port = port; + ret_val = cvmx_allocate_global_resource_range(CVMX_GR_TAG_PKO_IPORTS, + inf_port.u64, count, 1); + if (dbg) + debug("internal port alloc : port=%02d base=%02d count=%02d\n", + (int)port, ret_val, (int)count); + if (ret_val == -1) + return ret_val; + cvmx_cfg_port[xi.node][xi.interface][port].ccpp_pko_port_base = ret_val; + cvmx_cfg_port[xi.node][xi.interface][port].ccpp_pko_num_ports = count; + return 0; +}