From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Wed, 28 Feb 2018 19:51:56 +0000 (+0100)
Subject: sunxi: spl: remove DMA related settings of the NAND controller
X-Git-Tag: v2025.01-rc5-pxa1908~4615^2~17
X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-logo.png?a=commitdiff_plain;h=136e32593335e031558a573158b6180fc80b551f;p=u-boot.git

sunxi: spl: remove DMA related settings of the NAND controller

Code has been changed to do not use DMA anymore with the NAND
controller, instead PIO is used. Then, DMA-specific initialization may
be dropped.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index ee3bfdac6d..322dd9e23a 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -289,11 +289,6 @@ static void nand_clock_setup(void)
 #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \
     defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I
 	setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0));
-#endif
-#ifdef CONFIG_MACH_SUN9I
-	setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
-#else
-	setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA));
 #endif
 	setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
 }