From: Sven Schwermer <sven@svenschwermer.de>
Date: Sun, 2 Jan 2022 19:36:56 +0000 (+0100)
Subject: imx: Enable ACTLR.SMP in SPL for i.MX6/7
X-Git-Url: http://git.dujemihanovic.xyz/img/static/git-logo.png?a=commitdiff_plain;h=0be742d06d9a8d4ca8048422a55305a8c4ac571b;p=u-boot.git

imx: Enable ACTLR.SMP in SPL for i.MX6/7

Similar to what has been done before with c5437e5b for u-boot proper, we
enable the SMP bit for SPL as well. This is necessary when SDP booting
straight into Linux, i.e. falcon boot. When SDP boot mode is active, the
ROM code does not set this bit which makes the caches not work once
activated in Linux.

On an i.MX6ULL (528MHz), this reduces a minimal kernel's boot time into
an initramfs shell from ~6.1s down to ~1.2s.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 444834995e..3f66d225c8 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -236,4 +236,9 @@ unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0,
 				unsigned long reg3);
 
 void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
+
+#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
+void enable_ca7_smp(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c
index 4e3b49a3fd..ab9b621a2a 100644
--- a/arch/arm/mach-imx/cache.c
+++ b/arch/arm/mach-imx/cache.c
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <asm/mach-imx/sys_proto.h>
 
-static void enable_ca7_smp(void)
+void enable_ca7_smp(void)
 {
 	u32 val;
 
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index bc56ef2b0b..a353bffddf 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -487,6 +487,9 @@ int arch_cpu_init(void)
 	if (is_mx6dqp())
 		noc_setup();
 #endif
+
+	enable_ca7_smp();
+
 	return 0;
 }
 
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 21690072e1..f6aec5a3aa 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -14,6 +14,7 @@
 #include <asm/mach-imx/rdc-sema.h>
 #include <asm/arch/imx-rdc.h>
 #include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/sys_proto.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/bootm.h>
 #include <dm.h>
@@ -323,6 +324,8 @@ int arch_cpu_init(void)
 
 	imx_gpcv2_init();
 
+	enable_ca7_smp();
+
 	return 0;
 }
 #else
diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c
index c90ce22404..bc41cbc687 100644
--- a/arch/arm/mach-imx/mx7ulp/soc.c
+++ b/arch/arm/mach-imx/mx7ulp/soc.c
@@ -13,6 +13,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/hab.h>
+#include <asm/mach-imx/sys_proto.h>
 #include <asm/setup.h>
 #include <linux/bitops.h>
 
@@ -77,6 +78,7 @@ enum bt_mode get_boot_mode(void)
 
 int arch_cpu_init(void)
 {
+	enable_ca7_smp();
 	return 0;
 }