mtd: spi-nor: Move SR3 WPS bit definition in the correct location

Move the SR3 bit definition in the right place. Fix
what is likely a rebase artifact. No functional change.

Fixes: 215f1d5794c6 ("mtd: spi-nor: Clear Winbond SR3 WPS bit on boot")
Signed-off-by: Marek Vasut <marex@denx.de>

diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 1ae586b2e5fa69c78f3fea11c0f3fbbd3cfbb421..655a6d197ea7051f9c7c56f66e94177d7c1fc263 100644 (file)
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -182,15 +182,15 @@
 /* Status Register 2 bits. */
 #define SR2_QUAD_EN_BIT7       BIT(7)
 
+/* Status Register 3 bits. */
+#define SR3_WPS                        BIT(2)
+
 /*
  * Maximum number of flashes that can be connected
  * in stacked/parallel configuration
  */
 #define SNOR_FLASH_CNT_MAX     2
 
-/* Status Register 3 bits. */
-#define SR3_WPS                        BIT(2)
-
 /* For Cypress flash. */
 #define SPINOR_OP_RD_ANY_REG                   0x65    /* Read any register */
 #define SPINOR_OP_WR_ANY_REG                   0x71    /* Write any register */