.id = UCLASS_PINCTRL,
.of_match = mt7622_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt7622_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
.id = UCLASS_PINCTRL,
.of_match = mt7623_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt7623_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
.id = UCLASS_PINCTRL,
.of_match = mt7629_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt7629_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
.id = UCLASS_PINCTRL,
.of_match = mt7981_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt7981_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
.flags = DM_FLAG_PRE_RELOC,
.id = UCLASS_PINCTRL,
.of_match = mt7986_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt7986_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
.id = UCLASS_PINCTRL,
.of_match = mt7988_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt7988_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
.id = UCLASS_PINCTRL,
.of_match = mt8512_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt8512_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
.id = UCLASS_PINCTRL,
.of_match = mt8516_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt8516_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
.id = UCLASS_PINCTRL,
.of_match = mt8518_pctrl_match,
.ops = &mtk_pinctrl_ops,
+ .bind = mtk_pinctrl_common_bind,
.probe = mtk_pinctrl_mt8518_probe,
.priv_auto = sizeof(struct mtk_pinctrl_priv),
};
}
#endif
+int mtk_pinctrl_common_bind(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(DM_GPIO) || \
+ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO))
+ return mtk_gpiochip_register(dev);
+#else
+ return 0;
+#endif
+}
+
int mtk_pinctrl_common_probe(struct udevice *dev,
const struct mtk_pinctrl_soc *soc)
{
struct mtk_pinctrl_priv *priv = dev_get_priv(dev);
- int ret = 0;
u32 i = 0;
fdt_addr_t addr;
u32 base_calc = soc->base_calc;
priv->base[i] = (void __iomem *)addr;
}
-#if CONFIG_IS_ENABLED(DM_GPIO) || \
- (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO))
- ret = mtk_gpiochip_register(dev);
-#endif
-
- return ret;
+ return 0;
}
/* A common read-modify-write helper for MediaTek chips */
void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set);
void mtk_i_rmw(struct udevice *dev, u8 i, u32 reg, u32 mask, u32 set);
+int mtk_pinctrl_common_bind(struct udevice *dev);
int mtk_pinctrl_common_probe(struct udevice *dev,
const struct mtk_pinctrl_soc *soc);