power, timer: reset TBL before TBU

In order to avoid TBU increment due to TBL reaching its max
and wrapping, reset TBL before resetting TBU

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index ff9bb67e28686a9ec4b54bb9aa474e7184e75757..c43f254481a3c8a9ee4fdb1ca6dd12c527bf4396 100644 (file)
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -66,7 +66,7 @@ int timer_init(void)
        unsigned long temp;
 
        /* reset */
-       asm volatile("li %0,0 ; mttbu %0 ; mttbl %0;"
+       asm volatile("li %0,0 ; mttbl %0 ; mttbu %0;"
             : "=&r"(temp) );
 
        return (0);