]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
common: return type board_get_usable_ram_top
authorHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sat, 12 Aug 2023 18:16:58 +0000 (20:16 +0200)
committerHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tue, 15 Aug 2023 16:21:17 +0000 (18:21 +0200)
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
35 files changed:
arch/arm/mach-imx/imx8m/soc.c
arch/arm/mach-mvebu/arm64-common.c
arch/arm/mach-rockchip/sdram.c
arch/arm/mach-stm32mp/dram_init.c
arch/arm/mach-sunxi/board.c
arch/arm/mach-tegra/board2.c
arch/mips/mach-jz47xx/jz4780/jz4780.c
arch/mips/mach-octeon/dram.c
arch/riscv/cpu/fu540/dram.c
arch/riscv/cpu/fu740/dram.c
arch/riscv/cpu/generic/dram.c
arch/riscv/cpu/jh7110/dram.c
arch/x86/cpu/broadwell/sdram.c
arch/x86/cpu/coreboot/sdram.c
arch/x86/cpu/efi/payload.c
arch/x86/cpu/efi/sdram.c
arch/x86/cpu/ivybridge/sdram.c
arch/x86/cpu/qemu/dram.c
arch/x86/cpu/quark/dram.c
arch/x86/cpu/slimbootloader/sdram.c
arch/x86/cpu/tangier/sdram.c
arch/x86/include/asm/u-boot-x86.h
arch/x86/lib/fsp1/fsp_dram.c
arch/x86/lib/fsp2/fsp_dram.c
board/broadcom/bcmns3/ns3.c
board/imgtec/boston/ddr.c
board/menlo/m53menlo/m53menlo.c
board/raspberrypi/rpi/rpi.c
board/ti/am65x/evm.c
board/ti/j721e/evm.c
board/ti/j721s2/evm.c
board/toradex/verdin-am62/verdin-am62.c
board/xilinx/common/board.c
common/board_f.c
include/init.h

index d5254886bed9e8fca59db28ebb29c59bbc00d4a4..78b775f449d9902f163d2db5296dadd4d2aeed27 100644 (file)
@@ -333,7 +333,7 @@ phys_size_t get_effective_memsize(void)
        }
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        ulong top_addr;
 
index d3a95730be5dc07b12362b4966c9dea319f3937e..4c67f1aba4defc99baf6de63022d885c143b5c3a 100644 (file)
@@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 #define USABLE_RAM_SIZE                0x80000000ULL
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        unsigned long top = CFG_SYS_SDRAM_BASE + min(gd->ram_size, USABLE_RAM_SIZE);
 
index 1d17a740ade92b84e5243f3bd8fca31b965e9746..99ecbdc3412a96b437f220716cd71d401d8a93a0 100644 (file)
@@ -216,7 +216,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        unsigned long top = CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE;
 
index 80ba5c27741cc3fe511fb0611b5d561c09f821df..7f37b0d2aa2cdd50649fc86ac8133ad35a5750b1 100644 (file)
@@ -40,7 +40,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        phys_size_t size;
        phys_addr_t reg;
index 391a65a5495f54b4a264ab097826fe7c94f82c85..78597ad932c486ebc124356383ee34439f8d9a4e 100644 (file)
@@ -64,7 +64,7 @@ static struct mm_region sunxi_mem_map[] = {
 };
 struct mm_region *mem_map = sunxi_mem_map;
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /* Some devices (like the EMAC) have a 32-bit DMA limit. */
        if (gd->ram_top > (1ULL << 32))
index 0df18360ca63c29fa8ae2c51f1fcc61e87594ca9..981768bb0e1f028eeac868dedf82aa087f3b258c 100644 (file)
@@ -403,7 +403,7 @@ int dram_init_banksize(void)
  * This function is called before dram_init_banksize(), so we can't simply
  * return gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        ulong ram_top;
 
index 15d1eff2ba7ad0f083aa4f2787e4b799a604d320..676c305fd3e900b655256de1ed7a0a0ad1b29ae9 100644 (file)
@@ -76,7 +76,7 @@ void board_init_f(ulong dummy)
 }
 #endif /* CONFIG_SPL_BUILD */
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return CFG_SYS_SDRAM_BASE + (256 * 1024 * 1024);
 }
index 85cb084c13ff3e9d87737b6e01c92ad0dcffac0e..5b1311d8b5b9b92ebe2a34b41a795af5327da607 100644 (file)
@@ -77,7 +77,7 @@ phys_size_t get_effective_memsize(void)
        return UBOOT_RAM_SIZE_MAX;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
                /* Map a maximum of 256MiB - return not size but address */
index 44e11bd56c5dd6c9d6799f1941ee199fa9348eff..94d8018407e6e94bcbc60b54e11a9c1be9dd29d4 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index d6d4a41d25e36c849ee08af9d554a1f3e694d2e1..8657fcd165c31de87ae319f70d342732e93d147c 100644 (file)
@@ -20,7 +20,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_64BIT
        /*
index 44e11bd56c5dd6c9d6799f1941ee199fa9348eff..94d8018407e6e94bcbc60b54e11a9c1be9dd29d4 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index 2ad3f2044a2e6fd3081f8a12c6081dd2fa1230e7..1a9fa46d14b90d96dae18642193d56cafa098458 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index 1295121ae5b6e605fcb039e28911927c41919cf8..f477d513efce1152d4e4f2ed3a4ab23678fe78de 100644 (file)
@@ -25,7 +25,7 @@
 #include <asm/arch/pei_data.h>
 #include <asm/arch/pm.h>
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return mrc_common_board_get_usable_ram_top(total_size);
 }
index f4ee4cdf5d8c58ae05cc46346b516617e5a591f8..26352df421f7321de2ccb5283b53ebf6330ae48c 100644 (file)
@@ -27,7 +27,7 @@ unsigned int install_e820_map(unsigned int max_entries,
  * address, and how far U-Boot is moved by relocation are set in the global
  * data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        uintptr_t dest_addr = 0;
        int i;
index 19a25dd640817081c2209110f1189715dd848b2c..d8920effd3987f92b13ca5f9bced939545f4efeb 100644 (file)
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct efi_mem_desc *desc, *end;
        struct efi_entry_memmap *map;
index f3086db42c497258d69827d348c7042e08d00b27..56f3326146ca6c2158878771910644f162a23068 100644 (file)
@@ -11,7 +11,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return (ulong)efi_get_ram_base() + gd->ram_size;
 }
index 0718aefbb1fe795676f49da3544ea6a95fbe816a..95a826da7130e751b1c78b72dba4c8ff83363c1f 100644 (file)
@@ -46,7 +46,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CMOS_OFFSET_MRC_SEED_S3                156
 #define CMOS_OFFSET_MRC_SEED_CHK       160
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return mrc_common_board_get_usable_ram_top(total_size);
 }
index 1a52d1dc52282716f867cb13f2bf9460ccaa619c..d83abf00527132bb5838ddf9385d30c780aa0856 100644 (file)
@@ -72,7 +72,7 @@ int dram_init_banksize(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return qemu_get_low_memory_size();
 }
index 8b1ee2d5ae57b78020db8121a73c5c4f045f3477..ad98f3e07bae04874578ab56b62b37650e57407f 100644 (file)
@@ -184,7 +184,7 @@ int dram_init_banksize(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return gd->ram_size;
 }
index d748d5c7d4693380d1a6fae5bcd241ba8dd61430..fbb33b246e5b5f395c6b7d5a8a32fc07a903f4b7 100644 (file)
@@ -48,7 +48,7 @@ static struct sbl_memory_map_info *get_memory_map_info(void)
  * @total_size: The memory size that u-boot occupies
  * Return:    : The top available memory address lower than 4GB
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct sbl_memory_map_info *data;
        int i;
index 8a4b1c5d2d729d5fefe685aeba7d7a5cf328125d..ee74a1f0433ce3b1ba830aecb2f544d0e01af379 100644 (file)
@@ -204,7 +204,7 @@ unsigned int install_e820_map(unsigned int max_entries,
  * address, and how far U-Boot is moved by relocation are set in the global
  * data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct sfi_table_simple *sb;
        struct sfi_mem_entry *mentry;
index 02a8b0f15270ad410a691a353805b35190fceb9d..3acc58ad74b494635c79961a2210947753f1af3f 100644 (file)
@@ -77,7 +77,7 @@ int x86_cleanup_before_linux(void);
 void x86_enable_caches(void);
 void x86_disable_caches(void);
 int x86_init_cache(void);
-phys_size_t board_get_usable_ram_top(phys_size_t total_size);
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size);
 int default_print_cpuinfo(void);
 
 /* Set up a UART which can be used with printch(), printhex8(), etc. */
index 5825221d1e5da5f060e92543d035bb01bfc94474..eee9ce54b1ce64ac59b438402c7b0de4cb289f53 100644 (file)
@@ -34,7 +34,7 @@ int dram_init(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return fsp_get_usable_lowmem_top(gd->arch.hob_list);
 }
index f9ea1ab3baad63c1c3a21273a7cd3e677e71fb13..a1432239cfc1397717af8871c1b2a476d48f8f46 100644 (file)
@@ -77,7 +77,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if (!ll_boot_init())
                return gd->ram_size;
index 2a78df670cce7ca9cad275ff4eb4e4879fc7dca8..7ae6742c4be8ff487d412a18e2ffcba61aa9a59b 100644 (file)
@@ -183,7 +183,7 @@ int dram_init_banksize(void)
 }
 
 /* Limit RAM used by U-Boot to the DDR first bank End region */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return BCM_NS3_MEM_END;
 }
index 8532225dc0dbfd8291f5b33e12ed8e4ecebc98f1..cecf454011ccc9c0dc4ec3236dda73cdbd92cf7e 100644 (file)
@@ -23,7 +23,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        DECLARE_GLOBAL_DATA_PTR;
 
index ca3b81c57ff5c85132a24e99a856cc0d3d778f23..b8dffb0e48588565b188012be64466ce6d8fb141 100644 (file)
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static u32 mx53_dram_size[2];
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * WARNING: We must override get_effective_memsize() function here
index 38bcab15cf8aaff3e923a8b1ab2661c69f3d700b..cd823ad7465390c607f7fcf61e630f3030816d65 100644 (file)
@@ -334,7 +334,7 @@ static void set_fdt_addr(void)
 /*
  * Prevent relocation from stomping on a firmware provided FDT blob.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if ((gd->ram_top - fw_dtb_pointer) > SZ_64M)
                return gd->ram_top;
index 706b21981837a3c7d77729b6d9b82754e337c0b1..d52ac332f811144a3726c992ac988f83b2d2f73b 100644 (file)
@@ -59,7 +59,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 2398bead782981de5eabf2807df9e6dfdb9fabab..38fe447d8fac0dc3eada71ef4dfae8927642759a 100644 (file)
@@ -55,7 +55,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 8eaca9d5af26d70f5fbd2097f0a44a15fea4b4b5..7795300abc80f35c3d9352abccf78ba408df77c6 100644 (file)
@@ -43,7 +43,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 5b166b14ca658645cd3412758ed5f07d0b389523..a3d1d07a0cbf529230fbba487e7382f625ac762e 100644 (file)
@@ -37,7 +37,7 @@ int dram_init(void)
 /*
  * Avoid relocated U-Boot clash with Linux reserved-memory on 512 MB SoM
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return 0x9C000000;
 }
index 0328d68e751223d8c0fbb2d2eeb7d6b97c6ded74..906d5e3c2d7cf8f0e2ab4333352c079da19598c2 100644 (file)
@@ -627,7 +627,7 @@ int embedded_dtb_select(void)
 #endif
 
 #if defined(CONFIG_LMB)
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        phys_size_t size;
        phys_addr_t reg;
index 791c1e601c4d4edf4dc67fb0311334f5898b9439..e9f4edb93db9ae7cf39729ccbac75a98bc7caa4c 100644 (file)
@@ -330,7 +330,7 @@ __weak int mach_cpu_init(void)
 }
 
 /* Get the top of usable RAM */
-__weak phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
        /*
index dc3c1f220c33ce48e6cf75cf85c79d57cecd13eb..3bf30476a2e0d613564494953c15af36f63f9145 100644 (file)
@@ -309,7 +309,7 @@ int show_board_info(void);
  * @total_size:        monitor length in bytes (size of U-Boot code)
  * Return:     uppermost address for U-Boot relocation
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size);
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size);
 
 int board_early_init_f(void);