clk: renesas: Add R8A77965 M3N entries

Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index fb811e943ea13be3d37a4ced2a361606230c6fb4..48f19b138f350fb06e263cd5743a1950bcedb9ae 100644 (file)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -323,11 +323,30 @@ static const struct cpg_mssr_info r8a7796_cpg_mssr_info = {
        .get_pll_config         = r8a7796_get_pll_config,
 };
 
+static const struct cpg_mssr_info r8a77965_cpg_mssr_info = {
+       .core_clk               = r8a7796_core_clks,
+       .core_clk_size          = ARRAY_SIZE(r8a7796_core_clks),
+       .mod_clk                = r8a7796_mod_clks,
+       .mod_clk_size           = ARRAY_SIZE(r8a7796_mod_clks),
+       .mstp_table             = r8a7796_mstp_table,
+       .mstp_table_size        = ARRAY_SIZE(r8a7796_mstp_table),
+       .reset_node             = "renesas,r8a77965-rst",
+       .extalr_node            = "extalr",
+       .mod_clk_base           = MOD_CLK_BASE,
+       .clk_extal_id           = CLK_EXTAL,
+       .clk_extalr_id          = CLK_EXTALR,
+       .get_pll_config         = r8a7796_get_pll_config,
+};
+
 static const struct udevice_id r8a7796_clk_ids[] = {
        {
                .compatible     = "renesas,r8a7796-cpg-mssr",
                .data           = (ulong)&r8a7796_cpg_mssr_info,
        },
+       {
+               .compatible     = "renesas,r8a77965-cpg-mssr",
+               .data           = (ulong)&r8a77965_cpg_mssr_info,
+       },
        { }
 };