clk: sunxi: Add support for I2C gates/resets

Currently, the I2C clocks are configured in the sunxi board code. Add
the I2C clocks to the DM clock driver so they can be enabled from the
DM I2C driver using the normal uclass methods.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index 1342a6cda61ffcf99e7c97a13fb2ed3ea2f4b0b2..90b929d3d3216f5581f624433363811105c156e0 100644 (file)
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -31,6 +31,11 @@ static struct ccu_clk_gate a10_gates[] = {
 
        [CLK_AHB_GMAC]          = GATE(0x064, BIT(17)),
 
+       [CLK_APB1_I2C0]         = GATE(0x06c, BIT(0)),
+       [CLK_APB1_I2C1]         = GATE(0x06c, BIT(1)),
+       [CLK_APB1_I2C2]         = GATE(0x06c, BIT(2)),
+       [CLK_APB1_I2C3]         = GATE(0x06c, BIT(3)),
+       [CLK_APB1_I2C4]         = GATE(0x06c, BIT(15)),
        [CLK_APB1_UART0]        = GATE(0x06c, BIT(16)),
        [CLK_APB1_UART1]        = GATE(0x06c, BIT(17)),
        [CLK_APB1_UART2]        = GATE(0x06c, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index d30846a9b3ecfa1720b3f2105107d2cf0d8bff60..addf4f4d5cd5a9c2eab97ab5b1528b2316afd477 100644 (file)
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -25,6 +25,9 @@ static struct ccu_clk_gate a10s_gates[] = {
        [CLK_AHB_SPI1]          = GATE(0x060, BIT(21)),
        [CLK_AHB_SPI2]          = GATE(0x060, BIT(22)),
 
+       [CLK_APB1_I2C0]         = GATE(0x06c, BIT(0)),
+       [CLK_APB1_I2C1]         = GATE(0x06c, BIT(1)),
+       [CLK_APB1_I2C2]         = GATE(0x06c, BIT(2)),
        [CLK_APB1_UART0]        = GATE(0x06c, BIT(16)),
        [CLK_APB1_UART1]        = GATE(0x06c, BIT(17)),
        [CLK_APB1_UART2]        = GATE(0x06c, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index 52de1cb8d4b3404932748e1771ffbf3993c8bd23..c45d2c352983718b4e8d0325e6b06c20acae0f0e 100644 (file)
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -23,6 +23,9 @@ static struct ccu_clk_gate a23_gates[] = {
        [CLK_BUS_EHCI]          = GATE(0x060, BIT(26)),
        [CLK_BUS_OHCI]          = GATE(0x060, BIT(29)),
 
+       [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x06c, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x06c, BIT(18)),
@@ -53,6 +56,9 @@ static struct ccu_reset a23_resets[] = {
        [RST_BUS_EHCI]          = RESET(0x2c0, BIT(26)),
        [RST_BUS_OHCI]          = RESET(0x2c0, BIT(29)),
 
+       [RST_BUS_I2C0]          = RESET(0x2d8, BIT(0)),
+       [RST_BUS_I2C1]          = RESET(0x2d8, BIT(1)),
+       [RST_BUS_I2C2]          = RESET(0x2d8, BIT(2)),
        [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x2d8, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index 28ff82108e7d54ee0a5f8323ac77820ec5ccdbde..251fc3b705ecdf1596bb4ca3c4223ddad4890854 100644 (file)
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -30,6 +30,10 @@ static struct ccu_clk_gate a31_gates[] = {
        [CLK_AHB1_OHCI1]        = GATE(0x060, BIT(30)),
        [CLK_AHB1_OHCI2]        = GATE(0x060, BIT(31)),
 
+       [CLK_APB2_I2C0]         = GATE(0x06c, BIT(0)),
+       [CLK_APB2_I2C1]         = GATE(0x06c, BIT(1)),
+       [CLK_APB2_I2C2]         = GATE(0x06c, BIT(2)),
+       [CLK_APB2_I2C3]         = GATE(0x06c, BIT(3)),
        [CLK_APB2_UART0]        = GATE(0x06c, BIT(16)),
        [CLK_APB2_UART1]        = GATE(0x06c, BIT(17)),
        [CLK_APB2_UART2]        = GATE(0x06c, BIT(18)),
@@ -71,6 +75,10 @@ static struct ccu_reset a31_resets[] = {
        [RST_AHB1_OHCI1]        = RESET(0x2c0, BIT(30)),
        [RST_AHB1_OHCI2]        = RESET(0x2c0, BIT(31)),
 
+       [RST_APB2_I2C0]         = RESET(0x2d8, BIT(0)),
+       [RST_APB2_I2C1]         = RESET(0x2d8, BIT(1)),
+       [RST_APB2_I2C2]         = RESET(0x2d8, BIT(2)),
+       [RST_APB2_I2C3]         = RESET(0x2d8, BIT(3)),
        [RST_APB2_UART0]        = RESET(0x2d8, BIT(16)),
        [RST_APB2_UART1]        = RESET(0x2d8, BIT(17)),
        [RST_APB2_UART2]        = RESET(0x2d8, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index a46cb27bd1b68f6e488e9b2c13cc7a022229dcd7..1004a7950333b3a09a4852718193eeaa2e647add 100644 (file)
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -26,6 +26,9 @@ static const struct ccu_clk_gate a64_gates[] = {
        [CLK_BUS_OHCI0]         = GATE(0x060, BIT(28)),
        [CLK_BUS_OHCI1]         = GATE(0x060, BIT(29)),
 
+       [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x06c, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x06c, BIT(18)),
@@ -60,6 +63,9 @@ static const struct ccu_reset a64_resets[] = {
        [RST_BUS_OHCI0]         = RESET(0x2c0, BIT(28)),
        [RST_BUS_OHCI1]         = RESET(0x2c0, BIT(29)),
 
+       [RST_BUS_I2C0]          = RESET(0x2d8, BIT(0)),
+       [RST_BUS_I2C1]          = RESET(0x2d8, BIT(1)),
+       [RST_BUS_I2C2]          = RESET(0x2d8, BIT(2)),
        [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x2d8, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c
index bda7835c048bb30a1f0d211f9b447ef57e969605..8a0834d83a3206c2ab03c517a4e50b718238d93e 100644 (file)
--- a/drivers/clk/sunxi/clk_a80.c
+++ b/drivers/clk/sunxi/clk_a80.c
@@ -25,6 +25,11 @@ static const struct ccu_clk_gate a80_gates[] = {
        [CLK_BUS_SPI2]          = GATE(0x580, BIT(22)),
        [CLK_BUS_SPI3]          = GATE(0x580, BIT(23)),
 
+       [CLK_BUS_I2C0]          = GATE(0x594, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x594, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x594, BIT(2)),
+       [CLK_BUS_I2C3]          = GATE(0x594, BIT(3)),
+       [CLK_BUS_I2C4]          = GATE(0x594, BIT(4)),
        [CLK_BUS_UART0]         = GATE(0x594, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x594, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x594, BIT(18)),
@@ -40,6 +45,11 @@ static const struct ccu_reset a80_resets[] = {
        [RST_BUS_SPI2]          = RESET(0x5a0, BIT(22)),
        [RST_BUS_SPI3]          = RESET(0x5a0, BIT(23)),
 
+       [RST_BUS_I2C0]          = RESET(0x5b4, BIT(0)),
+       [RST_BUS_I2C1]          = RESET(0x5b4, BIT(1)),
+       [RST_BUS_I2C2]          = RESET(0x5b4, BIT(2)),
+       [RST_BUS_I2C3]          = RESET(0x5b4, BIT(3)),
+       [RST_BUS_I2C4]          = RESET(0x5b4, BIT(4)),
        [RST_BUS_UART0]         = RESET(0x5b4, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x5b4, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x5b4, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 5c3cc5bbf71dcf58a3d08048724174aefea6b8aa..8c6043f51e2687585b6e932d1e599e7d2fd69b67 100644 (file)
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -25,6 +25,9 @@ static struct ccu_clk_gate a83t_gates[] = {
        [CLK_BUS_EHCI1]         = GATE(0x060, BIT(27)),
        [CLK_BUS_OHCI0]         = GATE(0x060, BIT(29)),
 
+       [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x06c, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x06c, BIT(18)),
@@ -57,6 +60,9 @@ static struct ccu_reset a83t_resets[] = {
        [RST_BUS_EHCI1]         = RESET(0x2c0, BIT(27)),
        [RST_BUS_OHCI0]         = RESET(0x2c0, BIT(29)),
 
+       [RST_BUS_I2C0]          = RESET(0x2d8, BIT(0)),
+       [RST_BUS_I2C1]          = RESET(0x2d8, BIT(1)),
+       [RST_BUS_I2C2]          = RESET(0x2d8, BIT(2)),
        [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x2d8, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index 3adc6a983735b3220c0ec20139192aaaf86b8606..59afba53eef916da244d160cac4d84f939e65fca 100644 (file)
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -30,6 +30,9 @@ static struct ccu_clk_gate h3_gates[] = {
        [CLK_BUS_OHCI2]         = GATE(0x060, BIT(30)),
        [CLK_BUS_OHCI3]         = GATE(0x060, BIT(31)),
 
+       [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x06c, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x06c, BIT(18)),
@@ -74,6 +77,9 @@ static struct ccu_reset h3_resets[] = {
 
        [RST_BUS_EPHY]          = RESET(0x2c8, BIT(2)),
 
+       [RST_BUS_I2C0]          = RESET(0x2d8, BIT(0)),
+       [RST_BUS_I2C1]          = RESET(0x2d8, BIT(1)),
+       [RST_BUS_I2C2]          = RESET(0x2d8, BIT(2)),
        [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x2d8, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 86496ed1bb00eac2a86a4a0c5f080cef11f142bb..4a53788352c5b6d0f873dfd5297f8255426a2a8c 100644 (file)
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -22,6 +22,11 @@ static struct ccu_clk_gate h6_gates[] = {
        [CLK_BUS_UART2]         = GATE(0x90c, BIT(2)),
        [CLK_BUS_UART3]         = GATE(0x90c, BIT(3)),
 
+       [CLK_BUS_I2C0]          = GATE(0x91c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x91c, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x91c, BIT(2)),
+       [CLK_BUS_I2C3]          = GATE(0x91c, BIT(3)),
+
        [CLK_SPI0]              = GATE(0x940, BIT(31)),
        [CLK_SPI1]              = GATE(0x944, BIT(31)),
 
@@ -57,6 +62,11 @@ static struct ccu_reset h6_resets[] = {
        [RST_BUS_UART2]         = RESET(0x90c, BIT(18)),
        [RST_BUS_UART3]         = RESET(0x90c, BIT(19)),
 
+       [RST_BUS_I2C0]          = RESET(0x91c, BIT(16)),
+       [RST_BUS_I2C1]          = RESET(0x91c, BIT(17)),
+       [RST_BUS_I2C2]          = RESET(0x91c, BIT(18)),
+       [RST_BUS_I2C3]          = RESET(0x91c, BIT(19)),
+
        [RST_BUS_SPI0]          = RESET(0x96c, BIT(16)),
        [RST_BUS_SPI1]          = RESET(0x96c, BIT(17)),
 

diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c
index c39ba06fb850061093f63fa1616c140fc92713bd..af97d3bb9f742f303b81de6201538540a5400e37 100644 (file)
--- a/drivers/clk/sunxi/clk_h616.c
+++ b/drivers/clk/sunxi/clk_h616.c
@@ -24,6 +24,12 @@ static struct ccu_clk_gate h616_gates[] = {
        [CLK_BUS_UART4]         = GATE(0x90c, BIT(4)),
        [CLK_BUS_UART5]         = GATE(0x90c, BIT(5)),
 
+       [CLK_BUS_I2C0]          = GATE(0x91c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x91c, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x91c, BIT(2)),
+       [CLK_BUS_I2C3]          = GATE(0x91c, BIT(3)),
+       [CLK_BUS_I2C4]          = GATE(0x91c, BIT(4)),
+
        [CLK_SPI0]              = GATE(0x940, BIT(31)),
        [CLK_SPI1]              = GATE(0x944, BIT(31)),
 
@@ -68,6 +74,12 @@ static struct ccu_reset h616_resets[] = {
        [RST_BUS_UART4]         = RESET(0x90c, BIT(20)),
        [RST_BUS_UART5]         = RESET(0x90c, BIT(21)),
 
+       [RST_BUS_I2C0]          = RESET(0x91c, BIT(16)),
+       [RST_BUS_I2C1]          = RESET(0x91c, BIT(17)),
+       [RST_BUS_I2C2]          = RESET(0x91c, BIT(18)),
+       [RST_BUS_I2C3]          = RESET(0x91c, BIT(19)),
+       [RST_BUS_I2C4]          = RESET(0x91c, BIT(20)),
+
        [RST_BUS_SPI0]          = RESET(0x96c, BIT(16)),
        [RST_BUS_SPI1]          = RESET(0x96c, BIT(17)),
 

diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index a261296805e7e261201f841b86dd9dcfc8d32136..4d5b69a976516288245227a54eb7c04066493029 100644 (file)
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -32,6 +32,11 @@ static struct ccu_clk_gate r40_gates[] = {
 
        [CLK_BUS_GMAC]          = GATE(0x064, BIT(17)),
 
+       [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
+       [CLK_BUS_I2C2]          = GATE(0x06c, BIT(2)),
+       [CLK_BUS_I2C3]          = GATE(0x06c, BIT(3)),
+       [CLK_BUS_I2C4]          = GATE(0x06c, BIT(15)),
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x06c, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x06c, BIT(18)),
@@ -77,6 +82,11 @@ static struct ccu_reset r40_resets[] = {
 
        [RST_BUS_GMAC]          = RESET(0x2c4, BIT(17)),
 
+       [RST_BUS_I2C0]          = RESET(0x2d8, BIT(0)),
+       [RST_BUS_I2C1]          = RESET(0x2d8, BIT(1)),
+       [RST_BUS_I2C2]          = RESET(0x2d8, BIT(2)),
+       [RST_BUS_I2C3]          = RESET(0x2d8, BIT(3)),
+       [RST_BUS_I2C4]          = RESET(0x2d8, BIT(15)),
        [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x2d8, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 34ccda7e722febf4171de20ca819f551e9fd37f7..cce5c658ca014d752317e18ed3f2ee3ba0c25158 100644 (file)
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -20,6 +20,8 @@ static struct ccu_clk_gate v3s_gates[] = {
        [CLK_BUS_SPI0]          = GATE(0x060, BIT(20)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(24)),
 
+       [CLK_BUS_I2C0]          = GATE(0x06c, BIT(0)),
+       [CLK_BUS_I2C1]          = GATE(0x06c, BIT(1)),
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x06c, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x06c, BIT(18)),
@@ -38,6 +40,8 @@ static struct ccu_reset v3s_resets[] = {
        [RST_BUS_SPI0]          = RESET(0x2c0, BIT(20)),
        [RST_BUS_OTG]           = RESET(0x2c0, BIT(24)),
 
+       [RST_BUS_I2C0]          = RESET(0x2d8, BIT(0)),
+       [RST_BUS_I2C1]          = RESET(0x2d8, BIT(1)),
        [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x2d8, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),