sunxi: refactor serial base addresses to avoid asm/arch/cpu.h

At the moment we have each SoC's memory map defined in its own cpu.h,
which is included in include/configs/sunxi_common.h. This will be a
problem with the introduction of Allwinner RISC-V support.

Remove the inclusion of that header file from the common config header,
instead move the required serial base addresses (for the SPL) into a
separate header file. Then include the original cpu.h file only where
we really need it, which is only under arch/arm now.

This disentangles the architecture specific header files from the
generic code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/arch/arm/cpu/armv7/sunxi/sram.c b/arch/arm/cpu/armv7/sunxi/sram.c
index 28564c2846a780fee57ba8935d0e2dd75f87cf65..28ff6a1b7c23071d6124596fb5dc243a9beda199 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/sram.c
+++ b/arch/arm/cpu/armv7/sunxi/sram.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <init.h>
 #include <asm/io.h>
+#include <asm/arch/cpu.h>
 
 void sunxi_sram_init(void)
 {

diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S
index 2fe38a1a0473e3f0dfe6595ade83aa2fd7f01a53..939869b9ffa255a7c5f3c38cd0d280c73c4d720d 100644 (file)
--- a/arch/arm/cpu/armv8/fel_utils.S
+++ b/arch/arm/cpu/armv8/fel_utils.S
@@ -10,6 +10,7 @@
 #include <config.h>
 #include <asm/system.h>
 #include <linux/linkage.h>
+#include <asm/arch/cpu.h>
 
 /*
  * We don't overwrite save_boot_params() here, to save the FEL state upon

diff --git a/arch/arm/include/asm/arch-sunxi/boot0.h b/arch/arm/include/asm/arch-sunxi/boot0.h
index 30f5680757a5384f8b3e5a974405bcafb6c7ebd4..cad25c50bc6229d037e40b5cfc57bf77df458c53 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/boot0.h
+++ b/arch/arm/include/asm/arch-sunxi/boot0.h
@@ -3,6 +3,8 @@
  * Configuration settings for the Allwinner A64 (sun50i) CPU
  */
 
+#include <asm/arch/cpu.h>
+
 #if defined(CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER) && !defined(CONFIG_SPL_BUILD)
 /* reserve space for BOOT0 header information */
        b       reset

diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h
index 3d34261b0e59f5b83aadcb89e97babd50acef717..fcc8966cb0b31ed929adffcb9e6e200b2e95b094 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -9,6 +9,7 @@
 #define _SUNXI_CLOCK_H
 
 #include <linux/types.h>
+#include <asm/arch/cpu.h>
 
 #define CLK_GATE_OPEN                  0x1
 #define CLK_GATE_CLOSE                 0x0

diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index d6fe51f24bcbcd3007d68dfde875e47580c94cdc..3daee2f574a958a20ac1236a001d0ebc53546423 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -128,20 +128,6 @@ defined(CONFIG_MACH_SUN50I)
 #define SUNXI_CPUCFG_BASE              0x01c25c00
 #endif
 
-#ifdef CONFIG_MACH_SUNIV
-#define SUNXI_UART0_BASE               0x01c25000
-#define SUNXI_UART1_BASE               0x01c25400
-#define SUNXI_UART2_BASE               0x01c25800
-#else
-#define SUNXI_UART0_BASE               0x01c28000
-#define SUNXI_UART1_BASE               0x01c28400
-#define SUNXI_UART2_BASE               0x01c28800
-#endif
-#define SUNXI_UART3_BASE               0x01c28c00
-#define SUNXI_UART4_BASE               0x01c29000
-#define SUNXI_UART5_BASE               0x01c29400
-#define SUNXI_UART6_BASE               0x01c29800
-#define SUNXI_UART7_BASE               0x01c29c00
 #define SUNXI_PS2_0_BASE               0x01c2a000
 #define SUNXI_PS2_1_BASE               0x01c2a400
 
@@ -208,7 +194,6 @@ defined(CONFIG_MACH_SUN50I)
 #endif
 
 #define SUNXI_R_TWI_BASE               0x01f02400
-#define SUNXI_R_UART_BASE              0x01f02800
 #define SUN6I_P2WI_BASE                        0x01f03400
 #define SUNXI_RSB_BASE                 0x01f03400
 

diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
index 9b6bf8436016a5c275c21e4f27d9fa95e3f8f7a4..15ee092d358679401b94df642810da2cdb1eb08f 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
@@ -42,10 +42,6 @@
 #define SUNXI_DRAM_PHY0_BASE           0x04800000
 #endif
 
-#define SUNXI_UART0_BASE               0x05000000
-#define SUNXI_UART1_BASE               0x05000400
-#define SUNXI_UART2_BASE               0x05000800
-#define SUNXI_UART3_BASE               0x05000C00
 #define SUNXI_TWI0_BASE                        0x05002000
 #define SUNXI_TWI1_BASE                        0x05002400
 #define SUNXI_TWI2_BASE                        0x05002800
@@ -67,7 +63,6 @@
 #define SUNXI_R_CPUCFG_BASE            0x07000400
 #define SUNXI_PRCM_BASE                        0x07010000
 #define SUNXI_R_WDOG_BASE              0x07020400
-#define SUNXI_R_UART_BASE              0x07080000
 #define SUNXI_R_TWI_BASE               0x07081400
 
 #ifndef __ASSEMBLY__

diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
index 20025be231987be7efa3f4a1636432183b410559..2bf2675d5c104016c301f08230c91036542556b7 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
@@ -86,12 +86,6 @@
 #define SUNXI_LRADC_BASE               (REGS_APB0_BASE + 0x1800)
 
 /* APB1 Module */
-#define SUNXI_UART0_BASE               (REGS_APB1_BASE + 0x0000)
-#define SUNXI_UART1_BASE               (REGS_APB1_BASE + 0x0400)
-#define SUNXI_UART2_BASE               (REGS_APB1_BASE + 0x0800)
-#define SUNXI_UART3_BASE               (REGS_APB1_BASE + 0x0C00)
-#define SUNXI_UART4_BASE               (REGS_APB1_BASE + 0x1000)
-#define SUNXI_UART5_BASE               (REGS_APB1_BASE + 0x1400)
 #define SUNXI_TWI0_BASE                        (REGS_APB1_BASE + 0x2800)
 #define SUNXI_TWI1_BASE                        (REGS_APB1_BASE + 0x2C00)
 #define SUNXI_TWI2_BASE                        (REGS_APB1_BASE + 0x3000)
@@ -100,7 +94,6 @@
 
 /* RCPUS Module */
 #define SUNXI_PRCM_BASE                        (REGS_RCPUS_BASE + 0x1400)
-#define SUNXI_R_UART_BASE              (REGS_RCPUS_BASE + 0x2800)
 #define SUNXI_RSB_BASE                 (REGS_RCPUS_BASE + 0x3400)
 
 /* Misc. */

diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
index ca92c39927d80c0638001ac182c077e1b2466435..908a582ae0fb29a25ee1b70e374b53987740a7ba 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
@@ -10,10 +10,6 @@
 #define SUNXI_CCM_BASE                 0x02001000
 #define SUNXI_TIMER_BASE               0x02050000
 
-#define SUNXI_UART0_BASE               0x02500000
-#define SUNXI_UART1_BASE               0x02500400
-#define SUNXI_UART2_BASE               0x02500800
-#define SUNXI_UART3_BASE               0x02500C00
 #define SUNXI_TWI0_BASE                        0x02502000
 #define SUNXI_TWI1_BASE                        0x02502400
 #define SUNXI_TWI2_BASE                        0x02502800

diff --git a/arch/arm/include/asm/arch-sunxi/serial.h b/arch/arm/include/asm/arch-sunxi/serial.h
new file mode 100644 (file)
index 0000000..9386287
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/serial.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ *  hardcoded UART base addresses for early SPL use
+ *
+ *  Copyright (c) 2022  Arm Ltd.
+ */
+
+#ifndef SUNXI_SERIAL_MEMMAP_H
+#define SUNXI_SERIAL_MEMMAP_H
+
+#if defined(CONFIG_MACH_SUN9I)
+#define SUNXI_UART0_BASE               0x07000000
+#define SUNXI_R_UART_BASE              0x08002800
+#elif defined(CONFIG_SUN50I_GEN_H6)
+#define SUNXI_UART0_BASE               0x05000000
+#define SUNXI_R_UART_BASE              0x07080000
+#elif defined(CONFIG_MACH_SUNIV)
+#define SUNXI_UART0_BASE               0x01c25000
+#define SUNXI_R_UART_BASE              0
+#elif defined(CONFIG_SUNXI_GEN_NCAT2)
+#define SUNXI_UART0_BASE               0x02500000
+#define SUNXI_R_UART_BASE              0               // 0x07080000 (?>
+#else
+#define SUNXI_UART0_BASE               0x01c28000
+#define SUNXI_R_UART_BASE              0x01f02800
+#endif
+
+#define SUNXI_UART1_BASE               (SUNXI_UART0_BASE + 0x400)
+#define SUNXI_UART2_BASE               (SUNXI_UART0_BASE + 0x800)
+#define SUNXI_UART3_BASE               (SUNXI_UART0_BASE + 0xc00)
+
+#endif /* SUNXI_SERIAL_MEMMAP_H */

diff --git a/arch/arm/mach-sunxi/gtbus_sun9i.c b/arch/arm/mach-sunxi/gtbus_sun9i.c
index cf011c4cfa7f4da5f5c6926eb388b9172c94288b..5624621b500672aca64ee211460ac52b3701bf63 100644 (file)
--- a/arch/arm/mach-sunxi/gtbus_sun9i.c
+++ b/arch/arm/mach-sunxi/gtbus_sun9i.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/gtbus_sun9i.h>
 #include <asm/arch/sys_proto.h>
 

diff --git a/arch/arm/mach-sunxi/timer.c b/arch/arm/mach-sunxi/timer.c
index fc9d419a25e04fb880423a3a8e8d467464333884..9a6f6c06d8c70bf21da8fe64fc09c007c7ecba40 100644 (file)
--- a/arch/arm/mach-sunxi/timer.c
+++ b/arch/arm/mach-sunxi/timer.c
@@ -10,6 +10,7 @@
 #include <time.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/timer.h>
 #include <linux/delay.h>
 

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index d2d70f0fc23886c123a39dcd2d428cf56f939b04..b8ca77d031de4cd818a8d685887f7b5b0be79336 100644 (file)
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -12,7 +12,6 @@
 #ifndef _SUNXI_COMMON_CONFIG_H
 #define _SUNXI_COMMON_CONFIG_H
 
-#include <asm/arch/cpu.h>
 #include <linux/stringify.h>
 
 /* Serial & console */
@@ -24,6 +23,7 @@
 #define CFG_SYS_NS16550_CLK            24000000
 #endif
 #if !CONFIG_IS_ENABLED(DM_SERIAL)
+#include <asm/arch/serial.h>
 # define CFG_SYS_NS16550_COM1          SUNXI_UART0_BASE
 # define CFG_SYS_NS16550_COM2          SUNXI_UART1_BASE
 # define CFG_SYS_NS16550_COM3          SUNXI_UART2_BASE