imx: imx8mm_evk: enable pinctrl_wdog in SPL

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
index 8861542ec58bf462ff600334f39eeac8a551b5f2..e9fbf7b80215011e429ca82e860f1e9649d06030 100644 (file)
--- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
@@ -121,6 +121,10 @@
        u-boot,dm-spl;
 };
 
+&pinctrl_wdog {
+       u-boot,dm-spl;
+};
+
 &fec1 {
        phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
 };

diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index 7eeec6c485aea602efef7e8d997acac3ea62be61..ae2fb73fc5128b733f58053ab93b92fb770369c0 100644 (file)
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -72,23 +72,6 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#define WDOG_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-
-static iomux_v3_cfg_t const wdog_pads[] = {
-       IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
-};
-
-int board_early_init_f(void)
-{
-       struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-       imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
-
-       set_wdog_reset(wdog);
-
-       return 0;
-}
-
 static int power_init_board(void)
 {
        struct udevice *dev;
@@ -135,8 +118,6 @@ void board_init_f(ulong dummy)
 
        init_uart_clk(1);
 
-       board_early_init_f();
-
        timer_init();
 
        /* Clear the BSS. */