tegra: fdt: sort dts files

Sort nodes in dts files according the the following rules:

1) Any nodes that already exist in any /include/d file, in the order
they appear in the /include/d file.

2) Any nodes with a reg property, in order of their address.

3) Any nodes without a reg property, alphabetically by node name.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index cc086b17fd573fdcad17d16349aefaab29d19350..46e3785e44918d3c8a875ee23a5352ab400bb6fa 100644 (file)
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -4,10 +4,102 @@
        compatible = "nvidia,tegra20";
        interrupt-parent = <&intc>;
 
-       tegra_car: clock@60006000 {
-               compatible = "nvidia,tegra20-car";
-               reg = <0x60006000 0x1000>;
-               #clock-cells = <1>;
+       host1x {
+               compatible = "nvidia,tegra20-host1x", "simple-bus";
+               reg = <0x50000000 0x00024000>;
+               interrupts = <0 65 0x04   /* mpcore syncpt */
+                             0 67 0x04>; /* mpcore general */
+               status = "disabled";
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               ranges = <0x54000000 0x54000000 0x04000000>;
+
+               /* video-encoding/decoding */
+               mpe {
+                       reg = <0x54040000 0x00040000>;
+                       interrupts = <0 68 0x04>;
+                       status = "disabled";
+               };
+
+               /* video input */
+               vi {
+                       reg = <0x54080000 0x00040000>;
+                       interrupts = <0 69 0x04>;
+                       status = "disabled";
+               };
+
+               /* EPP */
+               epp {
+                       reg = <0x540c0000 0x00040000>;
+                       interrupts = <0 70 0x04>;
+                       status = "disabled";
+               };
+
+               /* ISP */
+               isp {
+                       reg = <0x54100000 0x00040000>;
+                       interrupts = <0 71 0x04>;
+                       status = "disabled";
+               };
+
+               /* 2D engine */
+               gr2d {
+                       reg = <0x54140000 0x00040000>;
+                       interrupts = <0 72 0x04>;
+                       status = "disabled";
+               };
+
+               /* 3D engine */
+               gr3d {
+                       reg = <0x54180000 0x00040000>;
+                       status = "disabled";
+               };
+
+               /* display controllers */
+               dc@54200000 {
+                       compatible = "nvidia,tegra20-dc";
+                       reg = <0x54200000 0x00040000>;
+                       interrupts = <0 73 0x04>;
+                       status = "disabled";
+
+                       rgb {
+                               status = "disabled";
+                       };
+               };
+
+               dc@54240000 {
+                       compatible = "nvidia,tegra20-dc";
+                       reg = <0x54240000 0x00040000>;
+                       interrupts = <0 74 0x04>;
+                       status = "disabled";
+
+                       rgb {
+                               status = "disabled";
+                       };
+               };
+
+               /* outputs */
+               hdmi {
+                       compatible = "nvidia,tegra20-hdmi";
+                       reg = <0x54280000 0x00040000>;
+                       interrupts = <0 75 0x04>;
+                       status = "disabled";
+               };
+
+               tvo {
+                       compatible = "nvidia,tegra20-tvo";
+                       reg = <0x542c0000 0x00040000>;
+                       interrupts = <0 76 0x04>;
+                       status = "disabled";
+               };
+
+               dsi {
+                       compatible = "nvidia,tegra20-dsi";
+                       reg = <0x54300000 0x00040000>;
+                       status = "disabled";
+               };
        };
 
        intc: interrupt-controller@50041000 {
@@ -18,44 +110,33 @@
                      < 0x50040100 0x0100 >;
        };
 
-       i2c@7000c000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "nvidia,tegra20-i2c";
-               reg = <0x7000C000 0x100>;
-               interrupts = < 70 >;
-               /* PERIPH_ID_I2C1, PLL_P_OUT3 */
-               clocks = <&tegra_car 12>, <&tegra_car 124>;
+       tegra_car: clock@60006000 {
+               compatible = "nvidia,tegra20-car";
+               reg = <0x60006000 0x1000>;
+               #clock-cells = <1>;
        };
 
-       i2c@7000c400 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "nvidia,tegra20-i2c";
-               reg = <0x7000C400 0x100>;
-               interrupts = < 116 >;
-               /* PERIPH_ID_I2C2, PLL_P_OUT3 */
-               clocks = <&tegra_car 54>, <&tegra_car 124>;
+       gpio: gpio@6000d000 {
+               compatible = "nvidia,tegra20-gpio";
+               reg = < 0x6000d000 0x1000 >;
+               interrupts = < 64 65 66 67 87 119 121 >;
+               #gpio-cells = <2>;
+               gpio-controller;
        };
 
-       i2c@7000c500 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "nvidia,tegra20-i2c";
-               reg = <0x7000C500 0x100>;
-               interrupts = < 124 >;
-               /* PERIPH_ID_I2C3, PLL_P_OUT3 */
-               clocks = <&tegra_car 67>, <&tegra_car 124>;
+       pinmux: pinmux@70000000 {
+               compatible = "nvidia,tegra20-pinmux";
+               reg = < 0x70000014 0x10    /* Tri-state registers */
+                       0x70000080 0x20    /* Mux registers */
+                       0x700000a0 0x14    /* Pull-up/down registers */
+                       0x70000868 0xa8 >; /* Pad control registers */
        };
 
-       i2c@7000d000 {
+       das@70000c00 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra20-i2c-dvc";
-               reg = <0x7000D000 0x200>;
-               interrupts = < 85 >;
-               /* PERIPH_ID_DVC_I2C, PLL_P_OUT3 */
-               clocks = <&tegra_car 47>, <&tegra_car 124>;
+               compatible = "nvidia,tegra20-das";
+               reg = <0x70000c00 0x80>;
        };
 
        i2s@70002800 {
@@ -76,29 +157,6 @@
                dma-channel = < 1 >;
        };
 
-       das@70000c00 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "nvidia,tegra20-das";
-               reg = <0x70000c00 0x80>;
-       };
-
-       gpio: gpio@6000d000 {
-               compatible = "nvidia,tegra20-gpio";
-               reg = < 0x6000d000 0x1000 >;
-               interrupts = < 64 65 66 67 87 119 121 >;
-               #gpio-cells = <2>;
-               gpio-controller;
-       };
-
-       pinmux: pinmux@70000000 {
-               compatible = "nvidia,tegra20-pinmux";
-               reg = < 0x70000014 0x10    /* Tri-state registers */
-                       0x70000080 0x20    /* Mux registers */
-                       0x700000a0 0x14    /* Pull-up/down registers */
-                       0x70000868 0xa8 >; /* Pad control registers */
-       };
-
        serial@70006000 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006000 0x40>;
@@ -134,28 +192,69 @@
                interrupts = < 123 >;
        };
 
-       sdhci@c8000000 {
-               compatible = "nvidia,tegra20-sdhci";
-               reg = <0xc8000000 0x200>;
-               interrupts = < 46 >;
+       nand: nand-controller@70008000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra20-nand";
+               reg = <0x70008000 0x100>;
        };
 
-       sdhci@c8000200 {
-               compatible = "nvidia,tegra20-sdhci";
-               reg = <0xc8000200 0x200>;
-               interrupts = < 47 >;
+       pwm: pwm@7000a000 {
+               compatible = "nvidia,tegra20-pwm";
+               reg = <0x7000a000 0x100>;
+               #pwm-cells = <2>;
        };
 
-       sdhci@c8000400 {
-               compatible = "nvidia,tegra20-sdhci";
-               reg = <0xc8000400 0x200>;
-               interrupts = < 51 >;
+       i2c@7000c000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra20-i2c";
+               reg = <0x7000C000 0x100>;
+               interrupts = < 70 >;
+               /* PERIPH_ID_I2C1, PLL_P_OUT3 */
+               clocks = <&tegra_car 12>, <&tegra_car 124>;
        };
 
-       sdhci@c8000600 {
-               compatible = "nvidia,tegra20-sdhci";
-               reg = <0xc8000600 0x200>;
-               interrupts = < 63 >;
+       i2c@7000c400 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra20-i2c";
+               reg = <0x7000C400 0x100>;
+               interrupts = < 116 >;
+               /* PERIPH_ID_I2C2, PLL_P_OUT3 */
+               clocks = <&tegra_car 54>, <&tegra_car 124>;
+       };
+
+       i2c@7000c500 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra20-i2c";
+               reg = <0x7000C500 0x100>;
+               interrupts = < 124 >;
+               /* PERIPH_ID_I2C3, PLL_P_OUT3 */
+               clocks = <&tegra_car 67>, <&tegra_car 124>;
+       };
+
+       i2c@7000d000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra20-i2c-dvc";
+               reg = <0x7000D000 0x200>;
+               interrupts = < 85 >;
+               /* PERIPH_ID_DVC_I2C, PLL_P_OUT3 */
+               clocks = <&tegra_car 47>, <&tegra_car 124>;
+       };
+
+       kbc@7000e200 {
+               compatible = "nvidia,tegra20-kbc";
+               reg = <0x7000e200 0x0078>;
+       };
+
+       emc@7000f400 {
+               #address-cells = < 1 >;
+               #size-cells = < 0 >;
+               compatible = "nvidia,tegra20-emc";
+               reg = <0x7000f400 0x200>;
        };
 
        usb@c5000000 {
@@ -183,127 +282,27 @@
                clocks = <&tegra_car 59>;       /* PERIPH_ID_USB3 */
        };
 
-       emc@7000f400 {
-               #address-cells = < 1 >;
-               #size-cells = < 0 >;
-               compatible = "nvidia,tegra20-emc";
-               reg = <0x7000f400 0x200>;
-       };
-
-       kbc@7000e200 {
-               compatible = "nvidia,tegra20-kbc";
-               reg = <0x7000e200 0x0078>;
+       sdhci@c8000000 {
+               compatible = "nvidia,tegra20-sdhci";
+               reg = <0xc8000000 0x200>;
+               interrupts = < 46 >;
        };
 
-       nand: nand-controller@70008000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "nvidia,tegra20-nand";
-               reg = <0x70008000 0x100>;
+       sdhci@c8000200 {
+               compatible = "nvidia,tegra20-sdhci";
+               reg = <0xc8000200 0x200>;
+               interrupts = < 47 >;
        };
 
-       pwm: pwm@7000a000 {
-               compatible = "nvidia,tegra20-pwm";
-               reg = <0x7000a000 0x100>;
-               #pwm-cells = <2>;
+       sdhci@c8000400 {
+               compatible = "nvidia,tegra20-sdhci";
+               reg = <0xc8000400 0x200>;
+               interrupts = < 51 >;
        };
 
-       host1x {
-               compatible = "nvidia,tegra20-host1x", "simple-bus";
-               reg = <0x50000000 0x00024000>;
-               interrupts = <0 65 0x04   /* mpcore syncpt */
-                             0 67 0x04>; /* mpcore general */
-               status = "disabled";
-
-               #address-cells = <1>;
-               #size-cells = <1>;
-
-               ranges = <0x54000000 0x54000000 0x04000000>;
-
-               /* video-encoding/decoding */
-               mpe {
-                       reg = <0x54040000 0x00040000>;
-                       interrupts = <0 68 0x04>;
-                       status = "disabled";
-               };
-
-               /* video input */
-               vi {
-                       reg = <0x54080000 0x00040000>;
-                       interrupts = <0 69 0x04>;
-                       status = "disabled";
-               };
-
-               /* EPP */
-               epp {
-                       reg = <0x540c0000 0x00040000>;
-                       interrupts = <0 70 0x04>;
-                       status = "disabled";
-               };
-
-               /* ISP */
-               isp {
-                       reg = <0x54100000 0x00040000>;
-                       interrupts = <0 71 0x04>;
-                       status = "disabled";
-               };
-
-               /* 2D engine */
-               gr2d {
-                       reg = <0x54140000 0x00040000>;
-                       interrupts = <0 72 0x04>;
-                       status = "disabled";
-               };
-
-               /* 3D engine */
-               gr3d {
-                       reg = <0x54180000 0x00040000>;
-                       status = "disabled";
-               };
-
-               /* display controllers */
-               dc@54200000 {
-                       compatible = "nvidia,tegra20-dc";
-                       reg = <0x54200000 0x00040000>;
-                       interrupts = <0 73 0x04>;
-                       status = "disabled";
-
-                       rgb {
-                               status = "disabled";
-                       };
-               };
-
-               dc@54240000 {
-                       compatible = "nvidia,tegra20-dc";
-                       reg = <0x54240000 0x00040000>;
-                       interrupts = <0 74 0x04>;
-                       status = "disabled";
-
-                       rgb {
-                               status = "disabled";
-                       };
-               };
-
-               /* outputs */
-               hdmi {
-                       compatible = "nvidia,tegra20-hdmi";
-                       reg = <0x54280000 0x00040000>;
-                       interrupts = <0 75 0x04>;
-                       status = "disabled";
-               };
-
-               tvo {
-                       compatible = "nvidia,tegra20-tvo";
-                       reg = <0x542c0000 0x00040000>;
-                       interrupts = <0 76 0x04>;
-                       status = "disabled";
-               };
-
-               dsi {
-                       compatible = "nvidia,tegra20-dsi";
-                       reg = <0x54300000 0x00040000>;
-                       status = "disabled";
-               };
+       sdhci@c8000600 {
+               compatible = "nvidia,tegra20-sdhci";
+               reg = <0xc8000600 0x200>;
+               interrupts = < 63 >;
        };
-
 };

diff --git a/board/avionic-design/dts/tegra20-tec.dts b/board/avionic-design/dts/tegra20-tec.dts
index 8135eebd65a81486ed8930bd0c5daf1bbb314d20..bf3ff1d00974f101522d2959e6fbcd596a1d27f6 100644 (file)
--- a/board/avionic-design/dts/tegra20-tec.dts
+++ b/board/avionic-design/dts/tegra20-tec.dts
@@ -31,6 +31,17 @@
                clock-frequency = <216000000>;
        };
 
+       nand-controller@70008000 {
+               nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
+               nvidia,width = <8>;
+               nvidia,timing = <26 100 20 80 20 10 12 10 70>;
+
+               nand@0 {
+                       reg = <0>;
+                       compatible = "hynix,hy27uf4g2b", "nand-flash";
+               };
+       };
+
        i2c@7000c000 {
                status = "disabled";
        };
@@ -55,17 +66,6 @@
                status = "disabled";
        };
 
-       nand-controller@70008000 {
-               nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
-               nvidia,width = <8>;
-               nvidia,timing = <26 100 20 80 20 10 12 10 70>;
-
-               nand@0 {
-                       reg = <0>;
-                       compatible = "hynix,hy27uf4g2b", "nand-flash";
-               };
-       };
-
        lcd_panel: panel {
                clock = <33260000>;
                xres = <800>;

diff --git a/board/compal/dts/tegra20-paz00.dts b/board/compal/dts/tegra20-paz00.dts
index 0fef7136fcd7b1ed03a7ded467b67c5ec832caba..31b064d41871332ae589222281c250c3bad7f130 100644 (file)
--- a/board/compal/dts/tegra20-paz00.dts
+++ b/board/compal/dts/tegra20-paz00.dts
@@ -14,6 +14,17 @@
                reg = <0x00000000 0x20000000>;
        };
 
+       host1x {
+               status = "okay";
+               dc@54200000 {
+                       status = "okay";
+                       rgb {
+                               status = "okay";
+                               nvidia,panel = <&lcd_panel>;
+                       };
+               };
+       };
+
        serial@70006000 {
                clock-frequency = < 216000000 >;
        };
@@ -42,17 +53,6 @@
                status = "disabled";
        };
 
-       host1x {
-               status = "okay";
-               dc@54200000 {
-                       status = "okay";
-                       rgb {
-                               status = "okay";
-                               nvidia,panel = <&lcd_panel>;
-                       };
-               };
-       };
-
        lcd_panel: panel {
                /* PAZ00 has 1024x600 */
                clock = <54030000>;

diff --git a/board/nvidia/dts/tegra20-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts
index b456406182b0a0800cec217a12f32c4f23b26575..aeda3a1ffbbd9cc92e13b38b979fa5031a17cd20 100644 (file)
--- a/board/nvidia/dts/tegra20-harmony.dts
+++ b/board/nvidia/dts/tegra20-harmony.dts
@@ -19,6 +19,16 @@
                clock-frequency = < 216000000 >;
        };
 
+       nand-controller@70008000 {
+               nvidia,wp-gpios = <&gpio 23 0>;         /* PC7 */
+               nvidia,width = <8>;
+               nvidia,timing = <26 100 20 80 20 10 12 10 70>;
+               nand@0 {
+                       reg = <0>;
+                       compatible = "hynix,hy27uf4g2b", "nand-flash";
+               };
+       };
+
        i2c@7000c000 {
                status = "disabled";
        };
@@ -42,14 +52,4 @@
        usb@c5004000 {
                nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
        };
-
-       nand-controller@70008000 {
-               nvidia,wp-gpios = <&gpio 23 0>;         /* PC7 */
-               nvidia,width = <8>;
-               nvidia,timing = <26 100 20 80 20 10 12 10 70>;
-               nand@0 {
-                       reg = <0>;
-                       compatible = "hynix,hy27uf4g2b", "nand-flash";
-               };
-       };
 };

diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts
index 5fd8ae2998248f95f93b3678fd4d418d62bea935..9cb9b5bdb1b9c750647984641cd47032ad0cff83 100644 (file)
--- a/board/nvidia/dts/tegra20-seaboard.dts
+++ b/board/nvidia/dts/tegra20-seaboard.dts
@@ -49,23 +49,14 @@
                clock-frequency = < 216000000 >;
        };
 
-       sdhci@c8000400 {
-               cd-gpios = <&gpio 69 0>; /* gpio PI5 */
-               wp-gpios = <&gpio 57 0>; /* gpio PH1 */
-               power-gpios = <&gpio 70 0>; /* gpio PI6 */
-       };
-
-       sdhci@c8000600 {
-               support-8bit;
-       };
-
-       usb@c5000000 {
-               nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
-               dr_mode = "otg";
-       };
-
-       usb@c5004000 {
-               status = "disabled";
+       nand-controller@70008000 {
+               nvidia,wp-gpios = <&gpio 59 0>;         /* PH3 */
+               nvidia,width = <8>;
+               nvidia,timing = <26 100 20 80 20 10 12 10 70>;
+               nand@0 {
+                       reg = <0>;
+                       compatible = "hynix,hy27uf4g2b", "nand-flash";
+               };
        };
 
        i2c@7000c000 {
@@ -80,6 +71,33 @@
                clock-frequency = <100000>;
        };
 
+       kbc@7000e200 {
+               linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c
+                       0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006
+                       0x03010005 0x03020013 0x03030012 0x03040021 0x03050020
+                       0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023
+                       0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a
+                       0x05010009 0x05020016 0x05030015 0x05040024 0x05050031
+                       0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018
+                       0x06030017 0x06040026 0x06050025 0x06060033 0x06070032
+                       0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036
+                       0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019
+                       0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044
+                       0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067
+                       0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068
+                       0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057
+                       0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d
+                       0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f
+                       0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040
+                       0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f
+                       0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050
+                       0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053
+                       0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072
+                       0x1d0700e1 0x1e000045 0x1e010046 0x1e020071
+                       0x1f04008a>;
+               linux,fn-keymap = <0x05040002>;
+       };
+
        emc@7000f400 {
                emc-table@190000 {
                        reg = < 190000 >;
@@ -117,52 +135,23 @@
                };
        };
 
-       kbc@7000e200 {
-               linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c
-                       0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006
-                       0x03010005 0x03020013 0x03030012 0x03040021 0x03050020
-                       0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023
-                       0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a
-                       0x05010009 0x05020016 0x05030015 0x05040024 0x05050031
-                       0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018
-                       0x06030017 0x06040026 0x06050025 0x06060033 0x06070032
-                       0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036
-                       0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019
-                       0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044
-                       0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067
-                       0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068
-                       0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057
-                       0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d
-                       0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f
-                       0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040
-                       0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f
-                       0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050
-                       0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053
-                       0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072
-                       0x1d0700e1 0x1e000045 0x1e010046 0x1e020071
-                       0x1f04008a>;
-               linux,fn-keymap = <0x05040002>;
+       usb@c5000000 {
+               nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
+               dr_mode = "otg";
        };
 
-       nand-controller@70008000 {
-               nvidia,wp-gpios = <&gpio 59 0>;         /* PH3 */
-               nvidia,width = <8>;
-               nvidia,timing = <26 100 20 80 20 10 12 10 70>;
-               nand@0 {
-                       reg = <0>;
-                       compatible = "hynix,hy27uf4g2b", "nand-flash";
-               };
+       usb@c5004000 {
+               status = "disabled";
        };
 
-       host1x {
-               status = "okay";
-               dc@54200000 {
-                       status = "okay";
-                       rgb {
-                               status = "okay";
-                               nvidia,panel = <&lcd_panel>;
-                       };
-               };
+       sdhci@c8000400 {
+               cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+               wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+               power-gpios = <&gpio 70 0>; /* gpio PI6 */
+       };
+
+       sdhci@c8000600 {
+               support-8bit;
        };
 
        lcd_panel: panel {
@@ -185,5 +174,4 @@
                nvidia,panel-vdd-gpios = <&gpio 22 0>;          /* PC6 */
                nvidia,panel-timings = <400 4 203 17 15>;
        };
-
 };