armv7: Use isb/dsb directly in start.S

Toolchains which do not directly support using "isb" and "dsb" directly
are no longer functionally supported in U-Boot. Furthermore, clang has
for a long time warned about using the alternate form that we were.
Update the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 7d7aac021e2261784ccf0500c2b90b32e9c50ab0..69e281b086af5b43334559b3557e416b4c17b327 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -134,8 +134,8 @@ ENTRY(c_runtime_cpu_setup)
  */
 #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
        mcr     p15, 0, r0, c7, c5, 0   @ invalidate icache
-       mcr     p15, 0, r0, c7, c10, 4  @ DSB
-       mcr     p15, 0, r0, c7, c5, 4   @ ISB
+       dsb
+       isb
 #endif
 
        bx      lr
@@ -188,8 +188,8 @@ ENTRY(cpu_init_cp15)
        mcr     p15, 0, r0, c8, c7, 0   @ invalidate TLBs
        mcr     p15, 0, r0, c7, c5, 0   @ invalidate icache
        mcr     p15, 0, r0, c7, c5, 6   @ invalidate BP array
-       mcr     p15, 0, r0, c7, c10, 4  @ DSB
-       mcr     p15, 0, r0, c7, c5, 4   @ ISB
+       dsb
+       isb
 
        /*
         * disable MMU stuff and caches