Currently start.S is inside arch/riscv/cpu/ax25/, but it can be
common for all RISC-V targets.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
# Copyright (C) 2017 Andes Technology Corporation.
# Rick Chen, Andes Technology Corporation <rick@andestech.com>
-head-y := arch/riscv/cpu/$(CPU)/start.o
+head-y := arch/riscv/cpu/start.o
libs-y += arch/riscv/cpu/
libs-y += arch/riscv/cpu/$(CPU)/
#
# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+extra-y = start.o
+
obj-y += cpu.o
# Copyright (C) 2017 Andes Technology Corporation
# Rick Chen, Andes Technology Corporation <rick@andestech.com>
-extra-y = start.o
-
obj-y := cpu.o
{
. = ALIGN(4);
.text : {
- arch/riscv/cpu/ax25/start.o (.text)
+ arch/riscv/cpu/start.o (.text)
}
/* This needs to come before *(.text*) */