select STM32_SDRAM
select STM32_RCC
select STM32_RESET
- select STM32X7_SERIAL
+ select STM32_SERIAL
select SYSCON
source "arch/arm/mach-stm32/stm32f4/Kconfig"
CONFIG_STM32_SDRAM=y
CONFIG_DM_RESET=y
CONFIG_STM32_RESET=y
-CONFIG_STM32X7_SERIAL=y
+CONFIG_STM32_SERIAL=y
CONFIG_STM32_SDRAM=y
CONFIG_DM_RESET=y
CONFIG_STM32_RESET=y
-CONFIG_STM32X7_SERIAL=y
+CONFIG_STM32_SERIAL=y
CONFIG_STM32_SDRAM=y
CONFIG_DM_RESET=y
CONFIG_STM32_RESET=y
-CONFIG_STM32X7_SERIAL=y
+CONFIG_STM32_SERIAL=y
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_OF_LIBFDT_OVERLAY=y
on STiH410 SoC. This is a basic implementation, it supports
following baudrate 9600, 19200, 38400, 57600 and 115200.
-config STM32X7_SERIAL
+config STM32_SERIAL
bool "STMicroelectronics STM32 SoCs on-chip UART"
depends on DM_SERIAL && (STM32F4 || STM32F7 || STM32H7)
help
obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
-obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
+obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
obj-$(CONFIG_MVEBU_A3700_UART) += serial_mvebu_a3700.o
#include <asm/io.h>
#include <serial.h>
#include <asm/arch/stm32.h>
-#include "serial_stm32x7.h"
+#include "serial_stm32.h"
DECLARE_GLOBAL_DATA_PTR;
};
U_BOOT_DRIVER(serial_stm32) = {
- .name = "serial_stm32x7",
+ .name = "serial_stm32",
.id = UCLASS_SERIAL,
.of_match = of_match_ptr(stm32_serial_id),
.ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef _SERIAL_STM32_X7_
-#define _SERIAL_STM32_X7_
+#ifndef _SERIAL_STM32_
+#define _SERIAL_STM32_
#define CR1_OFFSET(x) (x ? 0x0c : 0x00)
#define CR3_OFFSET(x) (x ? 0x14 : 0x08)