]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
serial: stm32: extend TC timeout
authorValentin Caron <valentin.caron@foss.st.com>
Fri, 4 Aug 2023 14:09:04 +0000 (16:09 +0200)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Wed, 16 Aug 2023 13:38:23 +0000 (15:38 +0200)
Waiting 150us TC bit couldn't be enough.

If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time
of 10 bits (1 byte in most use cases) at a baud rate of 115200).

Fixes: b4dbc5d65a67 ("serial: stm32: Wait TC bit before performing initialization")
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
drivers/serial/serial_stm32.c

index 0085113f6746a4cfc2977bc07458dbeb91d50e12..23d476fba28356b11febe2e2a840efc9235f6e41 100644 (file)
 #include "serial_stm32.h"
 #include <dm/device_compat.h>
 
+/*
+ * At 115200 bits/s
+ * 1 bit = 1 / 115200 = 8,68 us
+ * 8 bits = 69,444 us
+ * 10 bits are needed for worst case (8 bits + 1 start + 1 stop) = 86.806 us
+ */
+#define ONE_BYTE_B115200_US            87
+
 static void _stm32_serial_setbrg(fdt_addr_t base,
                                 struct stm32_uart_info *uart_info,
                                 u32 clock_rate,
@@ -209,12 +217,10 @@ static int stm32_serial_probe(struct udevice *dev)
         * before uart initialization, wait for TC bit (Transmission Complete)
         * in case there is still chars from previous bootstage to transmit
         */
-       ret = read_poll_timeout(readl, isr, isr & USART_ISR_TC, 10, 150,
-                               plat->base + ISR_OFFSET(stm32f4));
-       if (ret) {
-               clk_disable(&clk);
-               return ret;
-       }
+       ret = read_poll_timeout(readl, isr, isr & USART_ISR_TC, 50,
+                               16 * ONE_BYTE_B115200_US, plat->base + ISR_OFFSET(stm32f4));
+       if (ret)
+               dev_dbg(dev, "FIFO not empty, some character can be lost (%d)\n", ret);
 
        ret = reset_get_by_index(dev, 0, &reset);
        if (!ret) {