ARM: dts: stm32: add eth1 and eth2 support on stm32mp13

Add both ethernet MACs based on GMAC SNPS IP on stm32mp13.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
index 159ba8f8c9cc30d45db9a9c7767fbd0d934e0289..ad331b73d1821bd87e4284ff8a962d69909fd556 100644 (file)
--- a/arch/arm/dts/stm32mp131.dtsi
+++ b/arch/arm/dts/stm32mp131.dtsi
@@ -1328,6 +1328,37 @@
                        status = "disabled";
                };
 
+               eth1: eth1@5800a000 {
+                       compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac";
+                       reg = <0x5800a000 0x2000>;
+                       reg-names = "stmmaceth";
+                       interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&exti 68 1>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+                       clock-names = "stmmaceth",
+                                     "mac-clk-tx",
+                                     "mac-clk-rx",
+                                     "ethstp",
+                                     "eth-ck";
+                       clocks = <&rcc ETH1MAC>,
+                                <&rcc ETH1TX>,
+                                <&rcc ETH1RX>,
+                                <&rcc ETH1STP>,
+                                <&rcc ETH1CK_K>;
+                       st,syscon = <&syscfg 0x4 0xff0000>;
+                       snps,mixed-burst;
+                       snps,pbl = <2>;
+                       snps,axi-config = <&stmmac_axi_config_1>;
+                       snps,tso;
+                       status = "disabled";
+
+                       stmmac_axi_config_1: stmmac-axi-config {
+                               snps,wr_osr_lmt = <0x7>;
+                               snps,rd_osr_lmt = <0x7>;
+                               snps,blen = <0 0 0 0 16 8 4>;
+                       };
+               };
+
                usbh_ohci: usb@5800c000 {
                        compatible = "generic-ohci";
                        reg = <0x5800c000 0x1000>;
@@ -1404,6 +1435,12 @@
                        ts_cal2: calib@5e {
                                reg = <0x5e 0x2>;
                        };
+                       ethernet_mac1_address: mac1@e4 {
+                               reg = <0xe4 0x6>;
+                       };
+                       ethernet_mac2_address: mac2@ea {
+                               reg = <0xea 0x6>;
+                       };
                };
 
                /*

diff --git a/arch/arm/dts/stm32mp133.dtsi b/arch/arm/dts/stm32mp133.dtsi
index df451c3c2a26d77ec141e1cfb68d12b38886dd36..5cd5bde95358b6d890bebc5127dcb2b954b37785 100644 (file)
--- a/arch/arm/dts/stm32mp133.dtsi
+++ b/arch/arm/dts/stm32mp133.dtsi
@@ -64,5 +64,35 @@
                                };
                        };
                };
+
+               eth2: eth2@5800e000 {
+                       compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac";
+                       reg = <0x5800e000 0x2000>;
+                       reg-names = "stmmaceth";
+                       interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq";
+                       clock-names = "stmmaceth",
+                                     "mac-clk-tx",
+                                     "mac-clk-rx",
+                                     "ethstp",
+                                     "eth-ck";
+                       clocks = <&rcc ETH2MAC>,
+                                <&rcc ETH2TX>,
+                                <&rcc ETH2RX>,
+                                <&rcc ETH2STP>,
+                                <&rcc ETH2CK_K>;
+                       st,syscon = <&syscfg 0x4 0xff000000>;
+                       snps,mixed-burst;
+                       snps,pbl = <2>;
+                       snps,axi-config = <&stmmac_axi_config_2>;
+                       snps,tso;
+                       status = "disabled";
+
+                       stmmac_axi_config_2: stmmac-axi-config {
+                               snps,wr_osr_lmt = <0x7>;
+                               snps,rd_osr_lmt = <0x7>;
+                               snps,blen = <0 0 0 0 16 8 4>;
+                       };
+               };
        };
 };