arm: dts: k3-j7200: Add USB related DT entries

Add USB related DT entries to enable USB device mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index 10bb0694926fc52b91dc871711f61b9b59120fe9..4dca59cefa44465315200e6643dd5971a9227f93 100644 (file)
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -102,3 +102,17 @@
 &exp2 {
        u-boot,dm-spl;
 };
+
+&main_usbss0_pins_default {
+       u-boot,dm-spl;
+};
+
+&usbss0 {
+       u-boot,dm-spl;
+       ti,usb2-only;
+};
+
+&usb0 {
+       dr_mode = "peripheral";
+       u-boot,dm-spl;
+};

diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts
index 537ef2a79dad3ae242e08db7372ec22ae5a2eb04..969881fb83c80d8c93108da0398a5b3a8c45aad9 100644 (file)
--- a/arch/arm/dts/k3-j7200-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
@@ -30,6 +30,12 @@
                        J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
                >;
        };
+
+       main_usbss0_pins_default: main_usbss0_pins_default {
+               pinctrl-single,pins = <
+                       J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
+               >;
+       };
 };
 
 &wkup_uart0 {
@@ -121,3 +127,15 @@
                #gpio-cells = <2>;
        };
 };
+
+&usbss0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_usbss0_pins_default>;
+       ti,vbus-divider;
+       ti,usb2-only;
+};
+
+&usb0 {
+       dr_mode = "otg";
+       maximum-speed = "high-speed";
+};

diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index f3df5d8f101bf3d0c48bf7516c7a4859d9cac9b0..aaa1fdd5a3ce70381236d52fddf24dcd185a6083 100644 (file)
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -310,4 +310,34 @@
                clocks = <&k3_clks 193 1>;
                power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
        };
+
+       usbss0: cdns_usb@4104000 {
+               compatible = "ti,j721e-usb";
+               reg = <0x00 0x4104000 0x00 0x100>;
+               dma-coherent;
+               power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 288 12>, <&k3_clks 288 3>;
+               clock-names = "usb2_refclk", "lpm_clk";
+               assigned-clocks = <&k3_clks 288 12>;    /* USB2_REFCLK */
+               assigned-clock-parents = <&k3_clks 288 13>; /* HFOSC0 */
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               usb0: usb@6000000 {
+                       compatible = "cdns,usb3";
+                       reg = <0x00 0x6000000 0x00 0x10000>,
+                             <0x00 0x6010000 0x00 0x10000>,
+                             <0x00 0x6020000 0x00 0x10000>;
+                       reg-names = "otg", "xhci", "dev";
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,  /* irq.0 */
+                                    <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
+                                    <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
+                       interrupt-names = "host",
+                                         "peripheral",
+                                         "otg";
+                       maximum-speed = "super-speed";
+                       dr_mode = "otg";
+               };
+       };
 };

diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index ffd0d09ecee994a3a244dbcafde139ea46955571..f5e4166926dc4eb4d039acc32b48b294d7229db4 100644 (file)
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -129,6 +129,12 @@
                        J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
                >;
        };
+
+       main_usbss0_pins_default: main_usbss0_pins_default {
+               pinctrl-single,pins = <
+                       J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
+               >;
+       };
 };
 
 &wkup_uart0 {
@@ -196,4 +202,16 @@
        };
 };
 
+&usbss0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_usbss0_pins_default>;
+       ti,vbus-divider;
+       ti,usb2-only;
+};
+
+&usb0 {
+       dr_mode = "otg";
+       maximum-speed = "high-speed";
+};
+
 #include "k3-j7200-common-proc-board-u-boot.dtsi"