README: Drop SoC-specific comment about SPL

This should not be in the generic README file, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/README b/README
index c7ee06a21dd5c600f9e9bd8a9e005179df3f7e2d..78d91a2f62dd32d2509aa1c053bb6c53367f5929 100644 (file)
--- a/README
+++ b/README
@@ -213,15 +213,7 @@ board_init_r():
                there.
 
        SPL-specific notes:
-       - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
-               CONFIG_SYS_FSL_HAS_CCI400
-
-               Defined For SoC that has cache coherent interconnect
-               CCN-400
-
-               CONFIG_SYS_FSL_HAS_CCN504
-
-               Defined for SoC that has cache coherent interconnect CCN-504
+       - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined
 
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