stm32mp15xx-dhcor-avenger96.dtb \
stm32mp15xx-dhcor-drc-compact.dtb
-dtb-$(CONFIG_SOC_K3_AM6) += \
+dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am654-base-board.dtb \
k3-am654-r5-base-board.dtb \
k3-am65-iot2050-spl.dtb \
prompt "Texas Instruments' K3 based SoC select"
optional
-config SOC_K3_AM6
- bool "TI's K3 based AM6 SoC Family Support"
+config SOC_K3_AM654
+ bool "TI's K3 based AM654 SoC Family Support"
config SOC_K3_J721E
bool "TI's K3 based J721E SoC Family Support"
config SYS_K3_NON_SECURE_MSRAM_SIZE
hex
- default 0x80000 if SOC_K3_AM6
+ default 0x80000 if SOC_K3_AM654
default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2
default 0x1c0000 if SOC_K3_AM642
default 0x3c000 if SOC_K3_AM625
config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
hex
- default 0x58000 if SOC_K3_AM6
+ default 0x58000 if SOC_K3_AM654
default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2
default 0x180000 if SOC_K3_AM642
default 0x38000 if SOC_K3_AM625
config SYS_K3_MCU_SCRATCHPAD_BASE
hex
- default 0x40280000 if SOC_K3_AM6
+ default 0x40280000 if SOC_K3_AM654
default 0x40280000 if SOC_K3_J721E || SOC_K3_J721S2
help
Describes the base address of MCU Scratchpad RAM.
config SYS_K3_MCU_SCRATCHPAD_SIZE
hex
- default 0x200 if SOC_K3_AM6
+ default 0x200 if SOC_K3_AM654
default 0x200 if SOC_K3_J721E || SOC_K3_J721S2
help
Describes the size of MCU Scratchpad RAM.
config SYS_K3_BOOT_PARAM_TABLE_INDEX
hex
- default 0x41c7fbfc if SOC_K3_AM6
+ default 0x41c7fbfc if SOC_K3_AM654
default 0x41cffbfc if SOC_K3_J721E
default 0x41cfdbfc if SOC_K3_J721S2
default 0x701bebfc if SOC_K3_AM642
obj-$(CONFIG_TI_SECURE_DEVICE) += security.o
obj-$(CONFIG_ARM64) += cache.o
ifeq ($(CONFIG_SPL_BUILD),y)
-obj-$(CONFIG_SOC_K3_AM6) += am6_init.o
+obj-$(CONFIG_SOC_K3_AM654) += am654_init.o
obj-$(CONFIG_SOC_K3_J721E) += j721e_init.o
obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o
obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
#include <asm/system.h>
#include <asm/armv8/mmu.h>
-#ifdef CONFIG_SOC_K3_AM6
+#ifdef CONFIG_SOC_K3_AM654
/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
};
struct mm_region *mem_map = am654_mem_map;
-#endif /* CONFIG_SOC_K3_AM6 */
+#endif /* CONFIG_SOC_K3_AM654 */
#ifdef CONFIG_SOC_K3_J721E
#ifndef _ASM_ARCH_HARDWARE_H_
#define _ASM_ARCH_HARDWARE_H_
-#ifdef CONFIG_SOC_K3_AM6
+#ifdef CONFIG_SOC_K3_AM654
#include "am6_hardware.h"
#endif
#ifndef _ASM_ARCH_SPL_H_
#define _ASM_ARCH_SPL_H_
-#ifdef CONFIG_SOC_K3_AM6
+#ifdef CONFIG_SOC_K3_AM654
#include "am6_spl.h"
#endif
config TARGET_IOT2050_A53
bool "IOT2050 running on A53"
select ARM64
- select SOC_K3_AM6
+ select SOC_K3_AM654
select BOARD_LATE_INIT
select SYS_DISABLE_DCACHE_OPS
select BINMAN
config TARGET_AM654_A53_EVM
bool "TI K3 based AM654 EVM running on A53"
select ARM64
- select SOC_K3_AM6
+ select SOC_K3_AM654
select SYS_DISABLE_DCACHE_OPS
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
bool "TI K3 based AM654 EVM running on R5"
select CPU_V7R
select SYS_THUMB_BUILD
- select SOC_K3_AM6
+ select SOC_K3_AM654
select K3_LOAD_SYSFW
select K3_AM654_DDRSS
imply SYS_K3_SPL_ATF
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
-CONFIG_SOC_K3_AM6=y
+CONFIG_SOC_K3_AM654=y
CONFIG_TARGET_AM654_A53_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
-CONFIG_SOC_K3_AM6=y
+CONFIG_SOC_K3_AM654=y
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
-CONFIG_SOC_K3_AM6=y
+CONFIG_SOC_K3_AM654=y
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
-CONFIG_SOC_K3_AM6=y
+CONFIG_SOC_K3_AM654=y
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
-CONFIG_SOC_K3_AM6=y
+CONFIG_SOC_K3_AM654=y
CONFIG_TARGET_AM654_A53_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
-CONFIG_SOC_K3_AM6=y
+CONFIG_SOC_K3_AM654=y
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_ENV_SIZE=0x20000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
-CONFIG_SOC_K3_AM6=y
+CONFIG_SOC_K3_AM654=y
CONFIG_TARGET_IOT2050_A53=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x680000
obj-$(CONFIG_TI_K3_NAVSS_UDMA) += k3-udma.o
obj-$(CONFIG_TI_K3_PSIL) += k3-psil-data.o
k3-psil-data-y += k3-psil.o
-k3-psil-data-$(CONFIG_SOC_K3_AM6) += k3-psil-am654.o
+k3-psil-data-$(CONFIG_SOC_K3_AM654) += k3-psil-am654.o
k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o
k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
int i;
if (!soc_ep_map) {
- if (IS_ENABLED(CONFIG_SOC_K3_AM6))
+ if (IS_ENABLED(CONFIG_SOC_K3_AM654))
soc_ep_map = &am654_ep_map;
else if (IS_ENABLED(CONFIG_SOC_K3_J721E))
soc_ep_map = &j721e_ep_map;
config K3_AM654_DDRSS
bool "Enable AM654 DDRSS support"
- depends on RAM && SOC_K3_AM6
+ depends on RAM && SOC_K3_AM654
help
K3 based AM654 devices has DDR memory subsystem that comprises
Synopys DDR controller, Synopsis DDR phy and wrapper logic to