]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
sunxi: support boot console on uart1 for sun8i
authorTobias Schramm <t.schramm@manjaro.org>
Sun, 14 Feb 2021 23:19:58 +0000 (00:19 +0100)
committerAndre Przywara <andre.przywara@arm.com>
Fri, 19 Feb 2021 23:28:50 +0000 (23:28 +0000)
The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on
GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins
as boot console.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
arch/arm/include/asm/arch-sunxi/gpio.h
arch/arm/mach-sunxi/board.c

index de77bf638e21bfa977726a273ca01e390c420c4e..2969a530ae154716676fe4906eb25f7be3641175 100644 (file)
@@ -190,6 +190,7 @@ enum sunxi_gpio_number {
 #define SUN5I_GPG_SDC1         2
 #define SUN6I_GPG_SDC1         2
 #define SUN8I_GPG_SDC1         2
+#define SUN8I_GPG_UART1                2
 #define SUN6I_GPG_TWI3         2
 #define SUN5I_GPG_UART1                4
 
index ae6bc656d94ffbcb55a77df79026915b55bebe09..d25081c92fc63cf16f8940213d6fe41c25f346e8 100644 (file)
@@ -144,6 +144,11 @@ static int gpio_init(void)
        sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
        sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
        sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN8I) && \
+                               !defined(CONFIG_MACH_SUN8I_R40)
+       sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN8I_GPG_UART1);
+       sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN8I_GPG_UART1);
+       sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP);
 #else
 #error Unsupported console port number. Please fix pin mux settings in board.c
 #endif